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【VHDL-FPGA-Verilog】 s8_vga DL : 0: 用FPGA实现的VGA接口程序，采用的语言是VHDL硬件描述语言，大家可以参照下看看采用的器件是Altera EP2c35-Using FPGA to achieve the VGA interface program, the language used is VHDL hardware description language, we can see under the light of the devices used are Altera EP2c35
Update : 2024-05-10 Size : 438272 Publisher : 蔡白银1
【Program doc】 ddc DL : 0: 介绍了一种基于软件无线电思想的频分多址中频数字化接收机系统设计方案。它采用Altera公司的FPGA构成核心单元,通过不同的软件配置实现对三路频分多址信号的解调。 -Introduce a software-based radio thinking FDMA digital IF receiver system design. It uses Altera s FPGA constitute the core unit, through different software configuration for the three-way realize FDMA signal demodulation.
Update : 2024-05-10 Size : 816128 Publisher : 可难
【SCM】 DE2_70_User_manual_v101 DL : 0: Altera DE2-70开发板的使用手册-Altera DE2-70 development board manual
Update : 2024-05-10 Size : 3685376 Publisher : 桑圣锋
【VHDL-FPGA-Verilog】 7HzUUFHT DL : 0: altera公司cpld/fpga开发软件quartus2中文使用教程-altera company cpld/fpga development of software to use Chinese quartus2 Guide
Update : 2024-05-10 Size : 3098624 Publisher : 郑洪波
【VHDL-FPGA-Verilog】 AlteraSdramIP DL : 0: Altera Sdram IP 源码，VHDL写的-Altera Sdram IP source code, VHDL written
Update : 2024-05-10 Size : 781312 Publisher : 张敏
【VHDL-FPGA-Verilog】 hgb_pci_host DL : 0: 内有一PCI 主和PCI从，PCI TARGET 都是公开代码的，是工程文件，有仿真工程，使用说明。觉得好的就推荐一下。本PCI_HOST目前支持： 1、对目标PCI_T进行配置； 2、对目标进行单周期读写； 3、可以工作在33MHZ和66MHZ 4、支持目标跟不上时插入最长10时钟的等待。 ALTERA的PCI竟然收费的！！！软件里面调试仿真了半天，终于调通了，到了下载就突然弹出窗口说包含了有限制的IP CORE，是限制使用的-There is a PCI from PCI proprietors, PCI TARGET is open source, is the project document, there is simulation project, for use. Feel good about the recommendation. The PCI_HOST currently supports: 1, on the target configuration PCI_T 2, on the target for single-cycle read and write 3, can work in the 33Mhz and 66MHZ 4, to support the goals behind to insert a maximum of 10 clock hours of waiting. ALTERA the PCI even charges! ! ! Inside simulation software debugging for a long time, and finally had transferred to the download on the sudden pop-up window that contains a limited IP CORE, is to restrict the use of
Update : 2024-05-10 Size : 2712576 Publisher :
【VHDL-FPGA-Verilog】 DE2_with_VGA_LCM DL : 0: altera de2 开发板 vga lcd控制quatus 工程-altera de2 board vga lcd control quatus works
Update : 2024-05-10 Size : 2924544 Publisher : 李志
【Software Engineering】 Altera DL : 0: Altera设计文档：处理器手册，工具手册，配置手册，器件手册-Altera Design Documents: processor manuals, tools, manuals, configuration manuals, device manuals
Update : 2024-05-10 Size : 52253696 Publisher : veraking
【Embeded-SCM Develop】 FPGACARDprotel DL : 0: FPGA开发板的原理图很详细的，主要是ALTERA公司的CYCLONE，用protel画的，-FPGA development board schematic diagram of a very detailed, mainly ALTERA company CYCLONE, using Protel painting,
Update : 2024-05-10 Size : 6728704 Publisher : wangbo
【VHDL-FPGA-Verilog】 EPM7128SLC84-10chengxushili DL : 0: CPLD程序，ALTERA公司的EPM7128SLC84-10,PLCC84封装，已经调试过的程序，包含仿真文件，波形文件，VHDL语言程序，电路图以及PCB板和系统原理图，非常有用，尤其是初学EDA和CPLD、FPGA器件的人-CPLD procedures, ALTERA Corporation EPM7128SLC84-10, PLCC84 package, has been testing the procedure, including the simulation files, wave files, VHDL language program, circuit boards and systems, as well as PCB schematics, very useful, especially the beginner EDA and the CPLD, FPGA devices were
Update : 2024-05-10 Size : 155648 Publisher : xiaobo
【VHDL-FPGA-Verilog】 AlteraUSB DL : 0: Altera USB制作材料！有usb驱动！FPGA码源-Altera USB materials! There are usb drive! FPGA source code
Update : 2024-05-10 Size : 1750016 Publisher : 杨寿佳
【Other】 Altera_lib DL : 0: 压缩包提供altera公司逻辑器件的标准封装，共有8百多个器件，可以供用户选择，封装格式均用protel99SE。-Altera compressed package provided by the company
Update : 2024-05-10 Size : 120832 Publisher : visteon
【Embeded-SCM Develop】 I2C DL : 0: i2c ipcore of altera fpga that uses ahdl lauguage.
Update : 2024-05-10 Size : 7168 Publisher : linjack
【Other】 Cyclone_II_FPGA_sch DL : 0: altera 飓风二代开发板的原理图，pdf格式 -altera hurricane of the second generation development board schematics, pdf format
Update : 2024-05-10 Size : 236544 Publisher : dansen
【SCM】 ep1c6q240 DL : 0: Altera公司EP1C6Q240开发板电路图，绝对可用。经试验通过。和大家共享-Altera Corporation EP1C6Q240 development board schematics, is absolutely available. Adopted by the pilot. And for all to share
Update : 2024-05-10 Size : 527360 Publisher : 鲁凡水
【VHDL-FPGA-Verilog】 CycloneIII_SB_3C25 DL : 0: Altera的CycloneIII Start Board,使用的PFGA是3C25，包括原理图和PCB，用Cadence Allegro打开-Altera
Update : 2024-05-10 Size : 1480704 Publisher : iversn
【VHDL-FPGA-Verilog】 c2h_fft_cyclone_ii DL : 0: 关于用c2h实现fft算法的源代码和说明书 altera-On C2H achieve fft algorithm using the source code and a detailed description of altera
Update : 2024-05-10 Size : 723968 Publisher : 梁山皮
【Other】 modelsim_altera DL : 0: 关于如何在modelsim中进行设置，使它能对Altera芯片的进行功能及时序仿真。-ModelSim in on how to set up, so that it can Altera chip functional and timing simulation.
Update : 2024-05-10 Size : 234496 Publisher : 褚如龙
【VHDL-FPGA-Verilog】 miniUART DL : 0: 自适应波特率的通用异步串行接口电路（ＵＡＲＴ）的ＶＨＤＬ源码，在ＡＬＴＥＲＡ上运行成功-Adaptive baud rate of the universal asynchronous serial interface circuit (UART) the VHDL source code, to run successfully in ALTERA
Update : 2024-05-10 Size : 9216 Publisher : 甘甜
【Other】 make_interrupt_vector DL : 0: altera NIOS软核系统中断矢量使用例子，基于C语言-altera NIOS soft-core system interrupt vector to use examples, based on the C language
Update : 2024-05-10 Size : 3072 Publisher : 黄杰

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