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【VHDL-FPGA-Verilog】 Altera_FPGA_motor DL : 0: 基于Altera的FPGA的开发板的PWM测试程序。板子是周立功的MagicSOPC的。-Altera' s FPGA-based development board of the PWM test procedure. Ligong week the board is the MagicSOPC.
Update : 2024-05-21 Size : 1024 Publisher : 王祥以
【VHDL-FPGA-Verilog】 FFTVHDl DL : 0: 基于FPGA的fft实现摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core (Nios) soft-core processor, chip or replace the traditional high-performance single-chip DSP to realize the audio signals based on FFT analysis .
Update : 2024-05-21 Size : 32768 Publisher : xiang
【VHDL-FPGA-Verilog】 DE1_i2sound DL : 0: Altera的DE1平台资料，实现de1的音乐播放功能-Altera' s DE1 platform for information, the realization of the music player function de1
Update : 2024-05-21 Size : 83968 Publisher : lj
【Software Engineering】 stx_cookbook DL : 1: Altera公司高端FPGA高级综合指导手册，包括：算术运算单元，浮点处理技巧，数据编码格式转换，视频处理，仲裁逻辑，多路选择，存储逻辑，计数器，通信逻辑，循环冗余校验，随机和伪随机函数，加密和同步等编码风格和技巧；-advanced synthesis cookbook for Altera high-end FPGA(Stratix),incuding coding style and design tricks for arithmetic,floating points operation,tranlation and format convertion,vidio, arbitor, multiplexing, registers and memories,communication,CRC,random and pseudorandom functions,cryptography,synchronization,etc.
Update : 2024-05-21 Size : 962560 Publisher : 刘易
【VHDL-FPGA-Verilog】 led DL : 0: 与串口通讯控制led（使用VHDL硬件描述语言，通过Altera QuartusII 开发）-Serial control and communications led (the use of VHDL hardware description language, through the development of Altera QuartusII)
Update : 2024-05-21 Size : 86016 Publisher : 刘磊
【VC/MFC】 ad_clk_pll DL : 0: fpga的pll锁相设计，altera器件EP1s25的选用、设计-phase-locked pll of fpga design, altera devices EP1s25 selection, design
Update : 2024-05-21 Size : 3072 Publisher : dengxining
【VHDL-FPGA-Verilog】 adsx DL : 0: fpga的pll锁相设计，altera器件EP1s25的选用、设计-phase-locked pll of fpga design, altera devices EP1s25 selection, design
Update : 2024-05-21 Size : 2048 Publisher : dengxining
【VHDL-FPGA-Verilog】 ad_pll DL : 0: fpga的pll锁相设计，altera器件EP1s25的选用、设计-phase-locked pll of fpga design, altera devices EP1s25 selection, design
Update : 2024-05-21 Size : 3072 Publisher : dengxining
【VHDL-FPGA-Verilog】 uart16450 DL : 0: uart 16450合集,xilin altera lattice-collection of uart controller 16450
Update : 2024-05-21 Size : 822272 Publisher : jhv
【VHDL-FPGA-Verilog】 jtag_uart DL : 0: Configuration and usage of Altera s JTAG UART.
Update : 2024-05-21 Size : 5648384 Publisher : shahbaz
【Other】 GettingStartedwithAlteraDE1 DL : 0: This document describes the scope of Altera’s DE1 Development and Education Board and the suporting materials provided by the Altera Corporation. It also explains the installation process needed to use a DE1 board connected to a computer that has the Quartus II CAD system installed on it.
Update : 2024-05-21 Size : 691200 Publisher : rfanddsp
【VHDL-FPGA-Verilog】 SRAM_Controller DL : 0: Altera University Program的Avalon总线IP核，SRAM控制代码，可以解压后直接挂载在Avalon总线上 -Altera University Program of the Avalon bus IP core, SRAM control code can be directly mounted after decompression in the Avalon bus
Update : 2024-05-21 Size : 324608 Publisher : vicky
【Software Engineering】 app DL : 0: FPGA应用，Altera的FPGA开发板原理图汇集，FPGA最小系统，rs232串口转换，VGA显示-FPGA applications, Altera s FPGA development board schematic pooling, FPGA minimum system, rs232 serial converter, VGA display etc.-FPGA应用，Altera的FPGA开发板原理图汇集，FPGA最小系统，rs232串口转换，VGA显示-FPGA applications, Altera s FPGA development board schematic pooling, FPGA minimum system, rs232 serial converter, VGA display etc.
Update : 2024-05-21 Size : 1024 Publisher : xjjjjk
【ARM-PowerPC-ColdFire-MIPS】 DE2_NIOS_HOST_MOUSE_VGA DL : 0: 在ALTERA的DE2开发板上做的关于HOST_MOUSE的例子，基于Quartus II 和SOPC Builder以及Nios II IDE平台所完成！-ALTERA development in the DE2 board to do on HOST_MOUSE example, based on the Quartus II and SOPC Builder and Nios II IDE platform completed!
Update : 2024-05-21 Size : 1874944 Publisher : liguoyin
【ARM-PowerPC-ColdFire-MIPS】 DE2_SD_Card_Audio DL : 0: 在ALTERA的DE2板子上做的一个读写SD卡的例子，基于QUARTUS II ,SOPC BUILDER ,Nios II IDE实现的，从SD卡读写东西-The DE2 board in ALTERA do an SD card reader example, based on the QUARTUS II, SOPC BUILDER, Nios II IDE achieved something from the SD card reader
Update : 2024-05-21 Size : 1816576 Publisher : liguoyin
【VHDL-FPGA-Verilog】 Crack_DSP_Builder_90 DL : 0: Altera DSP BUILDER 9.0 SP2 破解-crack for dsp builder 9.0 SP2
Update : 2024-05-21 Size : 5120 Publisher : 胡文静
【Other】 DE2_SOPC_hardware_development DL : 0: 本书对国内高校中广泛使用的Altera DE2 SOPC开发平台的硬件设计进行了较为详细的分析，介绍了FPGA与SOPC的设计流程，并通过大量的练习详细地介绍了如何在DE2平台上进行从简单到复杂的数字系统设计。全书分为7章，包括FPGA基本概念与DE2开发平台、FPGA设计流程、SOPC技术、DE2平台应用、基于Altera FPGA的DSP技术、数字系统设计练习及“计算机组成原理”课程练习。本书配有光盘一张，包含了DE2系统的内容及DE2的高级应用范例。本书可作为电子类、计算机类、自动化类、机电类等专业本科生和研究生的教材或教学参考书，也可作为数字电子电路设计人员和大规模集成电路设计工程师的参考书。-This book on the domestic colleges and universities are widely used in Altera DE2 SOPC hardware development platform for the design of a more detailed analysis, introduced the FPGA and SOPC design flow, and through a lot of practice in detail how to DE2 platform from simple to the design of complex digital systems. The topics are divided into 7 chapters, including the basic concepts of FPGA with the DE2 development platform, FPGA design flow, SOPC technology, DE2 platform, the Altera FPGA-based DSP technology, digital system design practice and the "Principles of Computer Organization" course to practice. Book with a CD-ROM contains the contents of the DE2 System and DE2 examples of advanced applications. This book can be used as electronic, computer, automation categories, such as Electrical and professional undergraduate and postgraduate teaching materials or teaching reference books can also be used as the design of digital electronic circuits and large-scale integrated circuits
Update : 2024-05-21 Size : 33057792 Publisher : 邱浩淼
【VHDL-FPGA-Verilog】 fpga_tcl DL : 0: Altera FPGA的特殊管脚的连接(中文).doc TCL_教程.pdf-Altera FPGA tcl
Update : 2024-05-21 Size : 629760 Publisher : 朱柏
【Modem program】 modlesimcrack DL : 0: altera配套modelsim破解程序，绝对好用！注意要改环境变量-altera crack modelsim matching procedure, the absolute ease of use! Attention to environment variables to be changed
Update : 2024-05-21 Size : 228352 Publisher : lj
【VHDL-FPGA-Verilog】 f_divider DL : 0: 16-bit frequency divider (32 MHz,16,8,...) based on altera fpga.
Update : 2024-05-21 Size : 455680 Publisher : abu_faisul

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