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【SCM】 51BCD DL : 0: 本程序用于双字节数转BCD码显示，由于16位数最大值为65535，最高位为万位，所以采用一种特别的转换方法，特别声明：本程序只适用于双字节数据的转换，不适于三字节以上数据的转换。-the procedures for double byte few BCD switch shows that the median maximum 16 to 65,535. The maximum spaces for 10,000 and the use of a special conversion methods, in particular statement : The procedures apply only to double byte data conversion and unfit for more than three byte data conversion.
Update : 2024-05-09 Size : 5120 Publisher : 郭九生
【VHDL-FPGA-Verilog】 9.2_LCD_PULSE DL : 0: 基于Verilog-HDL的硬件电路的实现 9.2 具有LCD显示单元的可编程单脉冲发生器　　9.2.1 LCD显示单元的工作原理　　9.2.2 显示逻辑设计的思路与流程　　9.2.3 LCD显示单元的硬件实现　　9.2.4 可编程单脉冲数据的BCD码化　　9.2.5 task的使用方法　　9.2.6 for循环语句的使用方法　　9.2.7 二进制数转换BCD码的硬件实现　　9.2.8 可编程单脉冲发生器与显示单元的接口　　9.2.9 具有LCD显示单元的可编程单脉冲发生器的硬件实现　　9.2.10 编译指令-"文件包含"处理的使用方法 -based on Verilog-HDL hardware Circuit of 9.2 LCD display module with the series Single-Pulse Generator 9.2.1 LCD display module Principle 9.2.2 shows the logic design Thinking and Process 9.2.3 LCD display module hardware 9.2.4 programmable single pulse data BCD of the task 9.2.5 9.2.6 for the use of the phrase cycle use 9.2.7 binary conversion of BCD programmable hardware 9.2.8 single pulse generator with a said unit 9.2.9 interface with the LCD display module programmable pulse generator hardware 9 .2.10 compiler directives- "document includes" the use of
Update : 2024-05-09 Size : 5120 Publisher : 宁宁
【Other Embeded program】 Display_Control DL : 0: 液晶显示，用于液晶驱动，里面有初始化程序，float转ＢＣＤ码显示等-LCD for LCD Driver, which has initialization procedures, float switch BCD display
Update : 2024-05-09 Size : 1024 Publisher : ybl2006
【assembly language】 shuanzijieerjinzhizhuanhuan DL : 0: 双字节二进制数转换为十进制数子程序------- ；--------功能：双字节二进制数转换成五位BCD码-double byte binary number to decimal number subroutine------- ;-------- functions : double-byte binary conversion into five BCD
Update : 2024-05-09 Size : 1024 Publisher : jia
【ARM-PowerPC-ColdFire-MIPS】 bcdtohex DL : 0: arm的BCD转HEX，HEX转BCD的汇编程序-arm of the BCD switch HEX, HEX BCD to the compilation process
Update : 2024-05-09 Size : 1024 Publisher : fp
【VHDL-FPGA-Verilog】 verlog_basic DL : 0: 用verlog语言编的一些基础实验,适合于FPGA/CPLD的初学者。内容包括8位优先编码器，乘法器，除法器，多路选择器，二进制转BCD码，加法器，减法器等等。-verlog used some language addendum to the basic experiment, which is suitable for FPGA/CPLD beginners. Including eight priority encoder, multipliers, dividers, multi-path selectors, binary switch BCD, adder, subtraction, and so on.
Update : 2024-05-09 Size : 1004544 Publisher : leolili
【assembly language】 exam_and_homework DL : 0: 我在汇编课上完成的一些作业（上机常见习题）和汇编课本上的几个例题，常用的输入输出模块，如：把压缩存放的BCD码，转换为对应十进制数字ASCII码的程序；编写从键盘键入0至9中任一自然数x，求其立方值；内存中以BUFFER为首地址的缓冲区有10个非压缩型BCD码形式存放的十进制数，它们的值可能是0~9中的任意一个，将这些十进制数顺序显示在屏幕上等等，-I completed classes in the compilation of a number of operations (on the machine common exercises) and the compilation of textbooks on a few examples of commonly used input and output modules, such as: the compressed storage of BCD code, converted to decimal ASCII code corresponding to the procedure prepared from the keyboard type 0-9 in any natural number x, for the cubic value memory to buffer BUFFER headed Address has 10 non-compression type BCD code stored in the form of a decimal number, their value may be 0 ~ 9 any one of these decimal number sequence displayed on the screen, etc.
Update : 2024-05-09 Size : 854016 Publisher : 张某某
【Embeded-SCM Develop】 DS1302 DL : 0: 对DS1302完整的驱动，并能自动转换BCD码，实现结构方式进行存储和读取。
Update : 2024-05-09 Size : 2048 Publisher : panhai
【SCM】 8051Source DL : 0: 8051入間程序，包括串并轉換、數碼管驅動、ADC、BCD、16x2 LCD、串口通訊、伺服器驅動等。由本人編寫。-8051 Iruma procedures, including string and conversion, digital tube driver, ADC, BCD, 16x2 LCD, serial communication, such as server-driven. Prepared by me.
Update : 2024-05-09 Size : 4096 Publisher : keith
【assembly language】 code_transition DL : 0: 此文件包括各种编码转换程序，比如：二进制到BCD 码转换、二进制到ASCII码转换-This document includes a variety of encoding conversion process, such as: binary to BCD code conversion, binary to ASCII code conversion
Update : 2024-05-09 Size : 556032 Publisher : Shaban
【SCM】 bcd DL : 0: 功能：多字节ＢＣＤ码加法和减法入口条件：字节数在R7中，被加数在[R0]中，加数在[R1]中。出口信息：和在[R0]中，最高位进位在CY中。影响资源：PSW、A、R2 堆栈需求：２字节 -Features: multi-byte code BCD addition and subtraction entrance conditions: number of bytes in the R7 was summand in [R0], the summand in [R1] in. Export information: and in the [R0], the highest-bit binary in the CY. The impact of resources: PSW, A, R2 Stack requirements: 2 bytes
Update : 2024-05-09 Size : 3072 Publisher : kos
【VHDL-FPGA-Verilog】 shuzixitongshiyan DL : 0: 这个给QuartusII初学者用的，里面很清楚的通过几个例子来告诉怎么运用QuartusII．实验1：Quartus入门实验2：简单的组合逻辑电路设计实验3：七段数码管显示实验4：BCD码显示及运实验5：触发器和计数器实验6：存储器的设计实验7：基于DE2 的SOPC系统开发附录：-This QuartusII beginners to use, which is very clear through several examples to tell how the use of QuartusII. Experiment 1: Quartus entry Experiment 2: a simple combinational logic circuit design of experiment 3: Seven-Segment LED display experiment 4: BCD code display and shipped experiment 5: flip-flops and counters experiment 6: the design of memory test 7: Based on DE2 the SOPC System Development Appendix:
Update : 2024-05-09 Size : 754688 Publisher : yulieyar
【Windows Develop】 1234 DL : 0: 多字节ＢＣＤ码减法字节数在R7中，被减数在[R0]中，减数在[R1]中。 -Multi-byte code BCD subtraction in the number of bytes in the R7 was subtrahend in [R0], the decreases in [R1] in.
Update : 2024-05-09 Size : 2048 Publisher : 王平
【Embeded-SCM Develop】 Barcode DL : 0: 将输入的货号转化为压缩的BCD格式.如果长度不满14,则以右对齐-Item will be entered into a compressed BCD format. If the length of under 14, then right-justified
Update : 2024-05-09 Size : 1024 Publisher : daniel
【assembly language】 wendudeBCDmaxianshi DL : 0: 温度的BCD码显示在0809上显视的是电压值，所以必须将电压转换成温度值。LM35传感器的电压温度特性为“10mV/摄氏度”，经放大电路放大四倍后为40mV/摄氏度，因此对于255来说，每个数代表了20mV，也就是说电压值中的每个00000002代表了温度值中的00000001，由此可编出一张BCD码转换表，此部分程序如下： -Temperature BCD code displayed in the 0809 significantly depending on the voltage value, so the voltage must be converted into temperature values. LM35 temperature sensor voltage characteristics 10mV/° C , by the amplifier circuit to enlarge four times the post-40mV/° C, so for example 255, each number represents a 20mV, voltage value that is to say each represents 00,000,002 temperature value of 00000001, which can be made available for out of a BCD code conversion table, this part of the procedures are as follows:
Update : 2024-05-09 Size : 1024 Publisher : xuye
【VHDL-FPGA-Verilog】 eecadd_8 DL : 0: 此程序用VHDL语言编写，在四位加法器基础上完成8位二进制加法，输出是BCD码-This procedure using VHDL language, in the four adder based on the completion of eight binary adder, the output is BCD code
Update : 2024-05-09 Size : 196608 Publisher : 韩善华
【MPI】 add_16_bcd DL : 0: 此程序采用VHDL语言，完成在16位十六进制加法器的基础上将输出进行BCD码转换，实现输出是BCD码的16位二进制加法器-This procedure using VHDL language, completed in 16-bit hexadecimal adder based on output BCD code conversion, the realization of output is BCD code of 16 binary adder
Update : 2024-05-09 Size : 1024 Publisher : 韩善华
【VHDL-FPGA-Verilog】 add_32_bcd DL : 0: 此程序采用VHDL语言，完成在32位十六进制加法器的基础上将输出进行BCD码转换，实现输出是BCD码的32位二进制加法器-This procedure using VHDL language, completed in 32-bit hexadecimal adder based on output BCD code conversion, the realization of output is BCD code of 32 binary adder
Update : 2024-05-09 Size : 1024 Publisher : 韩善华
【VHDL-FPGA-Verilog】 te187 DL : 0: 基于高速串行BCD 码除法的数字频率计的设计-Based on high-speed serial BCD code of the digital frequency divider Design
Update : 2024-05-09 Size : 208896 Publisher : 张贺寅
【VHDL-FPGA-Verilog】 bcd2 DL : 0: 二位BCD码加法器加数与被加数都是2进制。输出和为10进制。结果显示在LED上。-Code 2 BCD adder with the summand summand are 2 hexadecimal. Output and 10 hexadecimal. The results showed that in the LED on.
Update : 2024-05-09 Size : 8192 Publisher : 刘锐

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