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Search - sdram - List
【
Embeded Linux
】
实用化嵌入式LINUX 大连
DL : 0
NET-DL 套件由日立SH7750处理 器、32M SDRAM 以及8M 的FLASH为用户的软件研发提供了足够的空间。板上提供非常 丰富的外设接口:一个10M/100M 自适应快速以太网接口、两个RS-232 串口、一个JTAG调 试口以及若干个基于PIO的指示灯。系统具有体积小、耗电低、处理能力强、网络功能强大 等特点,能够装载和运行嵌入式Linux 操作系统-NET-DL Boards Hitachi SH7750 processor, 32MB of SDRAM and 8MB of Flash users to the software development provides adequate space. Board with a very rich set of peripherals : a 10M/100M Adaptive Fast Ethernet interface, two RS-232 serial ports, a JTAG Debugging mouth and a number of lights on the PIO. Systems with small size, low power consumption, processing power and networking capabilities such as powerful features, capable of carrying and running embedded Linux
Update
: 2024-05-07
Size
: 1147904
Publisher
:
杨政
【
VHDL-FPGA-Verilog
】
Xilinx公司网站下的SDRAM Controller的参考设计
DL : 0
Update
: 2024-05-07
Size
: 128000
Publisher
:
于飞
【
VHDL-FPGA-Verilog
】
ref-sdr-sdram-vhdl
DL : 0
DDR控制器的VHDL源代码.采用FPGA实现DDR接口控制器,适用于Altera的FPGA,最高频率可到100M-DDR controller VHDL source code. Using FPGA DDR interface controller, applicable to Altera FPGA, the highest frequency available 100M
Update
: 2024-05-07
Size
: 776192
Publisher
:
张涛
【
ARM-PowerPC-ColdFire-MIPS
】
用ads仿真arm920t的设置
DL : 0
ads仿真arm920t的设置 附件中有两个文件 1、sdram配置文件,用obey c:\setm.txt进行配置 2、sdram设置图片-ads simulation arm920t settings annex is a two documents, SDRAM configuration files, obey c : \ setm.txt configured 2, SDRAM installed Photo
Update
: 2024-05-07
Size
: 204800
Publisher
:
安辉
【
Embeded-SCM Develop
】
mcf530实验源代码
DL : 0
mcf5307实验源代码,包括I2C、flash sdram LED1335液晶屏源代码-mcf5307 experimental source code, including I2C, flash SDRAM LED1335 LCD source
Update
: 2024-05-07
Size
: 12890112
Publisher
:
胡增敏
【
OS program
】
arm串口
DL : 0
基于4510B的引导程序的一些问题,并给出部分的源代码,FLASH一片,SDRAM两片。- Based on 4510B vectoring procedure some questions, and produce the partial sources code, a FLASH piece, the SDRAM two pieces.
Update
: 2024-05-07
Size
: 2471936
Publisher
:
a du
【
ARM-PowerPC-ColdFire-MIPS
】
S3C2410基础试验源代码
DL : 0
s3c2410 测试代码;主要有AD DA IIS IIC URITR RTC NAND SDRAM 可用ADS1.2调试。-s3c2410 testing the code; Major AD DA IIS IIC URITR RTC NAND SDRAM available ADS1.2 debugging.
Update
: 2024-05-07
Size
: 4564992
Publisher
:
nhy
【
VHDL-FPGA-Verilog
】
ddr_verilog_xilinx
DL : 0
DDR(双速率)SDRAM控制器参考设计,xilinx提供-DDR (double data rate) SDRAM controller reference design for Xilinx
Update
: 2024-05-07
Size
: 131072
Publisher
:
陈旭
【
VHDL-FPGA-Verilog
】
rd1014
DL : 0
SDRAM控制器,对SDRAM进行页写和对SDRAM进行页读的快速读写。是一个很好的SDRAM控制器-SDRAM controller, SDRAM to write for pages and pages of SDRAM for fast reading literacy. It is a very good SDRAM Controller
Update
: 2024-05-07
Size
: 10240
Publisher
:
陈长佳
【
Embeded Linux
】
K4S281632F-TC75
DL : 0
sdram 的详细资料,好好保留,公司内部所有,不得用于商业。-SDRAM detailed information properly retained within the company for all, not for commercial.
Update
: 2024-05-07
Size
: 106496
Publisher
:
李芳
【
VHDL-FPGA-Verilog
】
mt48lc2m32b2
DL : 0
SDRAM控制核,已经经过测试,完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
Update
: 2024-05-07
Size
: 9216
Publisher
:
洪戈
【
VHDL-FPGA-Verilog
】
SDRAM_C
DL : 0
SDRAM控制核,已经经过测试,完全可以稍加修改后应用-SDRAM control nuclear, has been tested, we can use a slightly modified
Update
: 2024-05-07
Size
: 1024
Publisher
:
洪戈
【
VHDL-FPGA-Verilog
】
sdram_control_burst
DL : 0
精简的sdram读写控制器例子,适用于数据采集系统,verilog,只支持burst方式的读写-streamlined read and write SDRAM controller example, applied to the data acquisition system, Verilog. only supports burst mode read and write
Update
: 2024-05-07
Size
: 153600
Publisher
:
梁文锋
【
Program doc
】
Pcidriver
DL : 1
PCI驱动编程实例,通过PCI可实施操作: 2、通过DMA方式往SDRAM写数据的步骤: (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写2 3、通过DMA方式从SDRAM读数据的步骤: (1) 往OMB1写传输数据次数 (2) 往OMB2写所要访问的SDRAM地址 (3) 往FIFO写3 -PCI-driven programming examples, can be implemented through the PCI operation : 2, DMA SDRAM write data to the steps : (a) to transfer data OMB1 write the number (2) to OMB2 was to be visited SDRAM Address (3) to FIFO write 2 3 through DMA side SDRAM-time data from the steps : (a) to transfer data OMB1 write the number (2) to OMB2 was to be visited SDRAM Address (3) to write FIFO 3
Update
: 2024-05-07
Size
: 62464
Publisher
:
葛琳
【
CSharp
】
SDRAMtest
DL : 0
44b0的SDRAM测试程序,使用ADS1.2环境-44b0 SDRAM testing procedures, the use of the environment ADS1.2
Update
: 2024-05-07
Size
: 48128
Publisher
:
王新
【
Books
】
SDRAM_DEVICE_OPERATION
DL : 0
三星公司SDRAM(K4S643232H-TC/L60 4 Banks x 512K x 32Bit Synchronous DRAM) 器件操作时序,本中文的页码和原英文对应的页码内容相对应-Samsung SDRAM (K4S643232H-TC/L60 4 x 51 Banks 2K x USB Synchronous DRAM) devices operate timing, the pages of the Chinese and English counterparts of the original pages should be relatively content
Update
: 2024-05-07
Size
: 152576
Publisher
:
佟小川
【
DSP program
】
C6416SDRAM
DL : 0
Ti C6416 读写 SDRAM 口范例. 编程环境CCS2.2版本-Ti C6416 literacy SDRAM mouth example. Version Programming Environment CCS2.2
Update
: 2024-05-07
Size
: 434176
Publisher
:
周论发
【
VHDL-FPGA-Verilog
】
EvsStore
DL : 0
用VHDL编写的由FPGA控制SDRAM的存储控制程序-VHDL prepared by the FPGA control SDRAM memory control procedures
Update
: 2024-05-07
Size
: 1024
Publisher
:
【
VHDL-FPGA-Verilog
】
sdramusevhdl
DL : 0
sdram的vhdl实现 本文介绍了sdram的控制时序特征,并介绍了采用vhdl语言实现的sdram控制器的关键技术-SDRAM This paper introduces the realization of SDRAM timing control features, and introduces the VHDL language SDRAM controller of the key technologies
Update
: 2024-05-07
Size
: 84992
Publisher
:
cxr
【
ARM-PowerPC-ColdFire-MIPS
】
at91rm9200bsp
DL : 0
AT91RM9200工程评估板的CPU源代码,基于ARM920T内核的AT91RM9200,180MHz,32/64M SDRAM,4M NOR Flash 10/100Mbps以太网,Linux操作系统。该源代码经过修改和项目支持,可以稳定运行。有一定的工程参考价值-AT91RM9200 CPU source code, Based on the AT91RM9200 ARM920T core, 180MHz. 32/64M SDRAM, 4M NOR Flash 10/100Mbps Ethernet, the Linux operating system. The modified source code and project support, and stable operation. There are certain projects in reference value
Update
: 2024-05-07
Size
: 259072
Publisher
:
Alex
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