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【Other Games】 avb-ddraw DL : 0: 通过DX的D3D实现一组图片的简单的动画功能,对于大家理解动画的动作方式很有帮助.-through DX D3D achieve a group photo of a simple animation functions, we can understand the animation moves very helpful way.
Update : 2024-05-20 Size : 15360 Publisher : xxx
【VHDL-FPGA-Verilog】 sdram DL : 0: sdram控制器这里考虑将SDRAM控制器结合目前项目开展来做相应的模块，而不做SDRAM通用控制器，这样也是考虑了FPGA的器件资源而采取的措施。同时编写的逻辑简单，没有多余的逻辑资源有利于提高控制器的速度，满足最后的设计要求。-SDRAM controller here consider SDRAM controller current projects do the corresponding module, but not so common SDRAM controller, as well as consider the FPGA device resources and the measures taken. While the preparation of simple logic, the logic is no spare resources to improve the speed controller to meet the final design requirements.
Update : 2024-05-20 Size : 3072 Publisher : 林博
【VHDL-FPGA-Verilog】 ddr_verilog_xilinx DL : 0: 该程序是在xilinx的FPGA上实现DDR_SDRAM接口，程序是用verylog语言写的-that the procedure was in Xilinx FPGA to achieve DDR_SDRAM interface, procedures used to write the language verylog
Update : 2024-05-20 Size : 23552 Publisher : 冯伟
【SCM】 EEPROM24CXX DL : 0: EEPROM 24CXX应用程序供参考对EEPROM数据区读出（当前值=ADDR+WRC_<=0FFH），每进行一次读操作将使ADDR值减一；读出数据后程序将把该数据存入通用寄存器中，开始存放的地址由FSR的值指定（范例为30H），每进行一次读操作将使FSR的值加一；读出规定个数（由寄存器REC_给定，范例值为0FH）的数值后，结束读出，回main-EEPROM qi application for reference to the District EEPROM data read out (current value = A DDR WRC_
Update : 2024-05-20 Size : 1024 Publisher : 风鹰
【VHDL-FPGA-Verilog】 ddr_sdram_controller_vhdl DL : 0: ddr_sdram控制器的vhdl代码,里面的地址和数据长度可配置,能满足不同用户的需要.-ddr_sdram controller vhdl code, which addresses and the data length can be configured, meet the needs of different users.
Update : 2024-05-20 Size : 13312 Publisher : hxwf801
【VHDL-FPGA-Verilog】 xapp935 DL : 0: ddr2 controller, verilog source code from xilinx
Update : 2024-05-20 Size : 347136 Publisher : Hubert
【VHDL-FPGA-Verilog】 ddr_cntl_a_withtb DL : 0: arm控制FPGA的DDR测试代码，共享一下-arm control FPGA DDR test code sharing what
Update : 2024-05-20 Size : 2384896 Publisher : yourname
【Other】 New_DDR333_product_guide_June12 DL : 0: New_DDR333_product_guide_June12手册.rar New_DDR333_product_guide_June12手册.rar-New_DDR333_product_guide_June12 manual. Ra r New_DDR333_product_guide_June12 manual. rar
Update : 2024-05-20 Size : 19456 Publisher : zhh
【Documents】 SDRAM-VHDL DL : 0: SDRAM控制器的VHDL实现，pdf格式，有需要多的，联系我-SDRAM controller VHDL, pdf format, it needs more, Contact
Update : 2024-05-20 Size : 124928 Publisher :
【Other】 memtest86+-1.30.tar DL : 0: ddr and sdram memory check,ddr and sdram memory check-ddr sdram memory and check, ddr sdram memory check and
Update : 2024-05-20 Size : 136192 Publisher : wangdong
【Embeded Linux】 Diag_Intel_IXP2400 DL : 0: 开发Inetl IXP2400平台所必须的硬件诊断和测试程序。该软件包支持的功能包括CPU基本功能检测，串行通讯测试，以太网测试，DDR测试，QDR存储器测试，PCI总线检测等等。-Inetl IXP2400 development platform necessary hardware diagnostic and test procedures. The package features include CPU support the basic functions of detection, serial communications testing, Ethernet, DDR test, QDR memory test, PCI bus detection and so on.
Update : 2024-05-20 Size : 1758208 Publisher : saishindou
【Special Effects】 saa7121init DL : 0: SAA7121初始化,能实现PAL NTSC两种制式.一部分来自NXP的FAE,一部分来自GOOGLE.-SAA7121 initialization, can realize the two PAL NTSC standard. From NXP as part of the FAE, a part from GOOGLE.
Update : 2024-05-20 Size : 2048 Publisher : lioushifeng
【VHDL-FPGA-Verilog】 xapp858 DL : 0: xilinx公司的ＤＤＲ实现源码，希望对你的开发有所帮助-Xilinx DDR to achieve the company s source code, and they hope to be helpful to your development
Update : 2024-05-20 Size : 64512 Publisher : feng
【Other Embeded program】 DDram DL : 0: 07全国大学生电子设计竞赛C题获奖作品FPGA外围接口双口RAM部分源码-07 National Undergraduate Electronic Design Contest winning entries C title peripheral interface FPGA dual-port RAM part of source
Update : 2024-05-20 Size : 1024 Publisher : SRY
【VHDL-FPGA-Verilog】 UART DL : 0: UART 串口程序，verilog语句，很好的实现了UART的通信功能！-UART serial procedures, verilog statement, very good communication to achieve the UART function!
Update : 2024-05-20 Size : 182272 Publisher : 王和国
【ARM-PowerPC-ColdFire-MIPS】 software_hardware_checksum_fpga DL : 0: nois中基于c的ddr等存储器的checksum的实现.-nois-based c of ddr memory, such as the realization of the checksum.
Update : 2024-05-20 Size : 6144 Publisher : qiuxin_88
【VHDL-FPGA-Verilog】 cntl_ddr3(xilinx) DL : 0: xilinx ddr3最新VHDL代码,通过调试-xilinx ddr3 latest VHDL code through debugging
Update : 2024-05-20 Size : 101376 Publisher : zhang chi
【Special Effects】 DRR_registration DL : 0: 通过将三维图像投影成2维ddr图像来实现2D-3D图像配准-By three-dimensional image projection into 2-D images ddr to achieve 2D-3D Image Registration
Update : 2024-05-20 Size : 108544 Publisher : 张旭
【Software Engineering】 DDR_SDRAM DL : 0: 该项对于设计DDSRAM有很大的帮助，希望可以对你有所帮助。-For the design of the DDSRAM have great help, I hope you can help.
Update : 2024-05-20 Size : 474112 Publisher : 王辉
【ARM-PowerPC-ColdFire-MIPS】 SEED-DaVinci_EVM_ddr DL : 0: SEED-DaVinci_EVM ddr 开发源代码-SEED-DaVinci_EVM ddr open source
Update : 2024-05-20 Size : 69632 Publisher : eser

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