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【
Embeded Linux
】
10.ddr
DL : 0
tiny6410 linux系统下ddr驱动程序-Under tiny6410 linux system ddr driver
Update
: 2024-05-03
Size
: 6144
Publisher
:
wjb
【
Linux driver
】
ddr
DL : 0
tiny210 s5pv210 DDR初始化-tiny210 s5pv210 DDR initialization
Update
: 2024-05-03
Size
: 1024
Publisher
:
满满
【
VHDL-FPGA-Verilog
】
ddr
DL : 0
this file contain sources code for ddr sdram
Update
: 2024-05-03
Size
: 6868992
Publisher
:
mohamed
【
DSP program
】
ddr
DL : 0
达芬奇系列开发板,ddr测试程序,用于检测Dsp和ddr之间的通路正常工作-Da Vinci series development board, DDR test program, used to detect between Dsp and DDR pathways to work normally
Update
: 2024-05-03
Size
: 57344
Publisher
:
卡卡罗特
【
Linux-Unix
】
ddr
DL : 0
Definitions for the DDR registers.
Update
: 2024-05-03
Size
: 2048
Publisher
:
kgrbqr
【
Linux driver
】
ddr
DL : 0
S3C6410的DDR驱动程序,实现了对DDR的读写操作-S3C6410 of DDR drivers, the realization of DDR read and write operations
Update
: 2024-05-03
Size
: 11264
Publisher
:
songxiuhe
【
Other
】
SiRFprims-DDR-MDDR-Hardware
DL : 0
SiRFprims DDR MDDR Hardware Design Guide
Update
: 2024-05-03
Size
: 336896
Publisher
:
丁雄
【
VHDL-FPGA-Verilog
】
DDR-SDRAM-Controller
DL : 0
DDR SDRAM控制器verilog代码及中文说明文档-DDR SDRAM Controller Using Virtex-5 FPGA Devices
Update
: 2024-05-03
Size
: 262144
Publisher
:
马龙
【
Applications
】
ddr
DL : 0
DDR solution for problem in NPC contest
Update
: 2024-05-03
Size
: 1024
Publisher
:
shi735712
【
Other
】
Atmel-SAMA5D3x-DDR-Application-note
DL : 0
Atmel SAMA5D3X DDR,DDR2,LPDDR2应用说明.-Atmel Microcontroller SAMA5D3x DDR2 LPDDR2 Application note
Update
: 2024-05-03
Size
: 269312
Publisher
:
wells zhu
【
Program doc
】
DDR
DL : 0
ddr memory design basics intro
Update
: 2024-05-03
Size
: 304128
Publisher
:
Umapathi Nadendla
【
Embeded-SCM Develop
】
DDR_MO
DL : 0
使用verilog语言实现简单的DDR SDRAM控制器(Using Verilog language to achieve a simple DDR SDRAM controller)
Update
: 2024-05-03
Size
: 1101824
Publisher
:
搬砖123
【
VHDL-FPGA-Verilog
】
ddr_sdram
DL : 0
包含ddr_sdr_conf_pkg.vhd,reset.vhd,ddr_dcm.vhd,user_if.vhd,ddr_sdram.vhd,Mt46v16m16.vhd以及仿真TB文件;设计采用Virtex ii系列芯片,DDR_SDRAM型号为Mt46v16m16,可用于进行DDR控制的初步学习使用;通过细致了解并进行逻辑控制,可深入理解DDR芯片内部构造; 支持133MHz系统时钟频率,突发长度为2,可进行读、写、NOP、激活、自刷新配置、预充电以及各ROW/BANK的激活改变等动作,较适合DDR入门使用(Including the ddr_sdr_conf_pkg.vhd, reset.vhd, ddr_dcm.vhd, user_if.vhd, ddr_sdram.vhd, Mt46v16m16.vhd and simulation TB files; designed with Virtex ii series chips, DDR_SDRAM model for the Mt46v16m16, can be used for initial control of DDR control ; Through careful understanding and logic control, in-depth understanding of DDR chip internal structure; Support 133MHz system clock frequency, burst length of 2, can be read, write, NOP, activation, self-refresh configuration, pre-charge and the activation of the ROW / BANK change action, more suitable for DDR entry)
Update
: 2024-05-03
Size
: 20480
Publisher
:
唛侬
【
Other
】
DDR设计系列
DL : 0
很好的PC内存条设计资料,如果你是内存设计的初学者,这里的资料很适合你,值得参考(Very good PC memory design information, if you are a beginner of memory design, the information here is very suitable for you, it is worth reference)
Update
: 2024-05-03
Size
: 10548224
Publisher
:
armyzhang
【
Other
】
DDR的原理和时序
DL : 0
嵌入式DDR时序方面的书籍,对调试时序有帮助(The principle and timing.Rar of DDR)
Update
: 2024-05-03
Size
: 2200576
Publisher
:
andy_zeng6
【
Software Engineering
】
DDR
DL : 0
低功耗DDR3芯片手册,DDR2芯片手册(Low power DDR3 chip Handbook,DDR2 chip Handbook)
Update
: 2024-05-03
Size
: 12024832
Publisher
:
zhoumijihua
【
Other
】
DDR_Stress_Tester_V1.0.3
DL : 0
imx6 ddr tool v2, ddr_stress_tester_v1.0.3
Update
: 2024-05-03
Size
: 645120
Publisher
:
nicelzd
【
VHDL-FPGA-Verilog
】
ddr3_mig8
DL : 0
fpga实现ddr数据收发测试,完整的工程,下载解压后,即可正确运行,已多次验证无误(FPGA DDR data receive and receive test, complete engineering, download and unzip, can run correctly, has been verified many times)
Update
: 2024-05-03
Size
: 16119808
Publisher
:
大木瓜
【
Linux-Unix
】
ddr_stress_tester_v2.70
DL : 0
DDR 压力测试 ,针对imx6平台的DDR压力测试工具(DDR test for imx6 platform)
Update
: 2024-05-03
Size
: 1767424
Publisher
:
小石头初见
【
Other
】
9G45DDRtest
DL : 0
裸板基于9G45的DDR测试样例,可用户判断DDR的空间大小,读写数据完整性,硬件片选是否正确,多颗DDR芯片硬件组合是否正确,硬件线路是否完整,DDR线路时序是否正常。(DDR bare board test case based on 9G45, the user can determine the DDR size of the space, read and write data integrity, hardware selection is correct, a plurality of DDR chip hardware combination is correct, the hardware circuit is complete, DDR line sequence is normal.)
Update
: 2024-05-03
Size
: 4096
Publisher
:
FriendHuang
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