Xilinx DDR to achieve the company s source code, and they hope to be helpful to your development

rtl_release
...........\par
...........\...\mem_tb_top.ucf
...........\readme.txt
...........\rtl
...........\...\mem_clk_rst.v
...........\...\mem_ctrl.v
...........\...\mem_io_ctrl.v
...........\...\mem_param.v
...........\...\mem_phy.v
...........\...\mem_phy_calib.v
...........\...\mem_phy_ctl_io.v
...........\...\mem_phy_dm_iob.v
...........\...\mem_phy_dqs_iob.v
...........\...\mem_phy_dq_iob.v
...........\...\mem_phy_init.v
...........\...\mem_phy_io.v
...........\...\mem_phy_write.v
...........\...\mem_RAM_D.v
...........\...\mem_tb_top.v
...........\...\mem_test.v
...........\...\mem_test_cmp.v
...........\...\mem_test_rom.v
...........\...\mem_test_rom_addr.v
...........\...\mem_test_rom_data.v
...........\...\mem_top.v
...........\...\mem_usr.v
...........\...\mem_usr_ip_addr_fifo.v
...........\...\mem_usr_ip_fifos.v
...........\...\mem_usr_ip_wr_fifo.v
...........\...\mem_usr_rd.v
...........\...\mem_usr_rd_fifo.v
...........\sim
...........\...\ddr2.v
...........\...\mem_interface_top_tb.v

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