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【Communication-Mobile】 FPGA-OFDM-VHDL DL : 0: Update : 2024-05-17 Size : 2767872 Publisher : wang
【VHDL-FPGA-Verilog】 add_16_pipe DL : 0: 16位加法器的流水线计算,verilog代码，用于FPGA平台。-16 pipelined adder, verilog code for the FPGA platform.
Update : 2024-05-17 Size : 1024 Publisher : qjyong
【Communication-Mobile】 DDS+PLL DL : 0: 基于FPGA的新的DDS+PLL时钟发生器-FPGA-based new DDS PLL clock generator
Update : 2024-05-17 Size : 145408 Publisher : 李敏
【Documents】 electronic_organ_desin DL : 0: 基于FPGA的电子琴设计,基于FPGA的电子琴设计-FPGA-based design of a flower, the flower FPGA-based design
Update : 2024-05-17 Size : 109568 Publisher : 李敏
【Documents】 vedio_decoder DL : 0: 基于FPGA的数字功率放大器的设计基于FPGA的数字功率放大器的设计-FPGA-based digital power amplifier design FPGA-based digital power amplifier design
Update : 2024-05-17 Size : 122880 Publisher : 李敏
【Embeded-SCM Develop】 CPLDFPGAprotellibrary DL : 0: CPLD FPGA常用protel库.rar-CPLD FPGA used the Protel. Rar
Update : 2024-05-17 Size : 318464 Publisher : 风也
【VHDL-FPGA-Verilog】 fpga_spi DL : 0: 文件中包含有用fpga实现isp接口的源码，以及和处理器接口，测试时处理器是ARM7。-document contains useful fpga achieve isp Interface source, as well as the processor interface, testing is ARM7 processor.
Update : 2024-05-17 Size : 2164736 Publisher : 张创贞
【VHDL-FPGA-Verilog】 FPGA_SONGER DL : 1: 基于FPGA的乐曲硬件演奏电路设计的实现，有完整的VHDL代码，并有PDF详细说明如何下载及跳线设置，并“梁祝”在GW48系列开发平台上下载调试成功。音乐优美-FPGA-based hardware music concert circuit design to achieve a complete VHDL code. and a detailed account of how the PDF download and set up the jumper, and "Butterfly" in a series of development platforms GW48 download debugging success. Music beautiful!
Update : 2024-05-17 Size : 746496 Publisher : wyy
【VHDL-FPGA-Verilog】 FPGA_TENNIS DL : 0: 基于FPGA的乒乓球游戏硬件电路的设计与实现，有完整的VHDL代码，并有PDF详细说明如何下载及跳线设置，并在GW48系列开发平台上下载调试成功-FPGA-based table tennis game hardware circuit design and realization of a complete VHDL code. and a detailed account of how the PDF download and jumper settings and in a series of development platforms GW48 download debugging success!
Update : 2024-05-17 Size : 311296 Publisher : wyy
【Software Engineering】 RSA_code_implement_with_FPGA DL : 0: RSA密码芯片的FPGA实现请有需要的人来下载-RSA chip FPGA please those who have the need to download
Update : 2024-05-17 Size : 3869696 Publisher : 磊
【VHDL-FPGA-Verilog】 Verilog_FPGA_fp DL : 0: 用Verilog实现基于FPGA的通用分频器-using Verilog FPGA-based Universal Frequency Divider
Update : 2024-05-17 Size : 124928 Publisher : xiong
【VHDL-FPGA-Verilog】 verilog-som DL : 0: 拿verilog编写的som(自适应神经网络算法)，用于障碍物检测，基于FPGA可综合实验，已经在altera的cylcone上实现-Canal verilog prepared som (adaptive neural network algorithm) for obstacle detection. Based on FPGA synthesis experiments, in altera achieve the cylcone
Update : 2024-05-17 Size : 5120 Publisher : 刘索山
【Special Effects】 FPGAMILSTD1553B DL : 0: 介绍用FPGA设计实现MIL-STD1553B部接口中的曼彻斯特码编解码器-presentation FPGA Design MIL-STD1553B Ministry interface Manchester encoding and decoding
Update : 2024-05-17 Size : 96256 Publisher : li
【source in ebook】 da_fir DL : 0: fpga da_fir的例程可供fpga设计参考-fpga da_fir the routines for fpga design reference
Update : 2024-05-17 Size : 578560 Publisher : 留恋
【Special Effects】 200701172435435 DL : 0: DSP6713和FPGA设计的红外图象处理体统-DSP6713 and FPGA design the infrared image processing decency
Update : 2024-05-17 Size : 79872 Publisher : hwhuang
【Embeded-SCM Develop】 FPGACPLD DL : 0: 学习FPGA CPLD的入门文档，比较适合初学者-learning portal CPLD FPGA files, suitable for beginners
Update : 2024-05-17 Size : 191488 Publisher : 刘东
【Communication】 Project1-DDS DL : 0: 直接频率和成DDS，可以在Altera的FPGA下载实现-directly into DDS frequency and can be downloaded from Altera FPGA Implementation
Update : 2024-05-17 Size : 8192 Publisher : lf
【Embeded-SCM Develop】 cpld_fpga_source_code DL : 0: cpld fpga 一些应用实例程序的源代码. -cpld fpga application procedures for some of the source code.
Update : 2024-05-17 Size : 289792 Publisher : 大为
【Software Engineering】 Virtex.files DL : 0: 在FPGA系统设计中，要达到性能最大化需要平衡具有混合性能效率的元器件，包括逻辑构造(fabric)、片上存储器、DSP和I/O带宽。在本文中，我将向你解释怎样能在追求更高系统级性能的过程中受益于Xilinx® 的Virtex™ -5 FPGA构建模块，特别是新的ExpressFabric™ 技术。以针对逻辑和算术功能的量化预期性能改进为例，我将探究ExpressFabric架构的主要功能。基于实际客户设计的基准将说明Virtex-5ExpressFabric技术性能平均比前一代Virtex-4 FPGA要高30％。-in FPGA system design to achieve maximum performance with the need to balance the efficiency of the mixed performance components including logical structure (fabric), on-chip memory, DSP and I/O bandwidth. In this article, I will explain how you can in the pursuit of higher system-level performance of the process to benefit from Xilinx
Update : 2024-05-17 Size : 97280 Publisher : yaoming
【Software Engineering】 FPGAEPP.files DL : 0: USB、串口、并口是PC机和外设进行通讯的常用接口，但对于数据量大的图像来说，若利用串行RS-232协议进行数据采集，速度不能达到图像数据采集所需的要求；而用USB进行数据采集，虽能满足所需速度，但要求外设必须支持USB协议，而USB协议与常用工程软件的接口还不普及，给使用带来困难。有些用户为了利用标准并行口(SPP)进行数据采集，但SPP协议的150kb/s传输率对于图像数据采集，同样显得太低。因此,为了采集数据量大的图像数据,本文采用了具有较高传输速率的增强型并行口协议(EPP)和FPGA，实现对OV7620CMOS图像传感器进行高速数据采集，它最高速率可以达到2Mb/s。-USB, serial port, parallel port is PC and peripherals used for the communication interface, But for the large volume of data images, if the use of Serial RS-232 data acquisition agreement, speed image data can not achieve the requirements for acquisition; using USB for data collection, can meet the required speed, But requirements must support USB peripherals agreement, and USB agreement with the commonly used engineering software interface is not universal, difficult to use. Some users to take advantage of standard parallel port (SPP), for data collection, But SPP agreement of 150 kb/s transfer rate for image data acquisition, the same is too low. Therefore, in order to collect large quantities of data image data, In this paper, the high transmission rate of enhanced parallel port proto
Update : 2024-05-17 Size : 81920 Publisher : yaoming

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