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【VHDL-FPGA-Verilog】 quartusii_handbook DL : 0: 关于quartus最权威和最详尽的说明和指导，是一个很好的新手入门的handbook-About quartus the most authoritative and detailed instructions and guidance, is a good novice' s handbook entry
Update : 2024-05-19 Size : 21582848 Publisher : 王宇坤
【VHDL-FPGA-Verilog】 fftip DL : 0: Quartus中fft ip core的使用-Quartus in the use of fft ip core
Update : 2024-05-19 Size : 449536 Publisher : mikecool
【ARM-PowerPC-ColdFire-MIPS】 pipeline DL : 0: 用Quartus II 设计的3级流水CPU，指令采用二次重叠执行方式-Quartus II design with three-stage pipeline CPU, instruction execution overlaps with the second time
Update : 2024-05-19 Size : 3028992 Publisher : kevin
【VHDL-FPGA-Verilog】 vhdl DL : 0: quartus 提示的各种错误问题的分析，和部分解决方案-quartus error analisyr
Update : 2024-05-19 Size : 4096 Publisher : zhan
【VHDL-FPGA-Verilog】 altera_avalon_i2c_V90 DL : 0: I2C IP for Quartus V9.0, can used in SOPC builder.
Update : 2024-05-19 Size : 12288 Publisher : homeuser
【VHDL-FPGA-Verilog】 altera_avalon_i2c_V91 DL : 0: I2C IP for Quartus V9.0 sp1, can used in SOPC builder.-I2C IP for Quartus V9.0, can used in SOPC builder.
Update : 2024-05-19 Size : 12288 Publisher : homeuser
【VHDL-FPGA-Verilog】 oc_i2c_master_top_v92 DL : 0: I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
Update : 2024-05-19 Size : 3072 Publisher : homeuser
【VHDL-FPGA-Verilog】 oc_i2c_master_byte_ctrl_v92 DL : 0: I2C IP for Quartus V9.0 sp2, can used in SOPC builder.
Update : 2024-05-19 Size : 3072 Publisher : homeuser
【VHDL-FPGA-Verilog】 Crack_QII90 DL : 0: quartus9.0破解器，能够破解quartus9.0-quartus crack
Update : 2024-05-19 Size : 14336 Publisher :
【VHDL-FPGA-Verilog】 Quartus_Common_Error_And_Warning_Analyze DL : 0: Quatus常见错误汇总与分析该文章来源 :一是来自网上几处出处的汇总二是来自作者本人应用过程中遇到的问题。可以帮助大家解决烦人的quartus警告和error 仅供参考 -Summary and analysis of common mistakes Quatus the article Source: First, a summary of provenance from the Internet a few second is from the author and the problems encountered in the application process. Can help you solve the annoying warnings and error in quartus reference
Update : 2024-05-19 Size : 15360 Publisher : 龙也
【Other】 quartus2 DL : 0: 您现在阅读的是 Quartus II 简介手册。 Altera® Quartus® II 设计软件是适合单芯片可编程系统 (SOPC) 的最全面的设计环境。如果您以前用过 MAX+PLUS® II 软件、其它设计软件或 ASIC 设计软件，并且准备改用 Quartus II 软件，或如果您对 Quartus II 软件有了一些了解但想进一步了解它的功能，那么本手册非常适合您。 -You are now reading the Quartus II brochure. Altera ® Quartus ® II design software is suitable for single-chip programmable system (SOPC) the most comprehensive design environment. If you have previously used the MAX+ PLUS ® II software, ASIC design software or other design software, and is prepared to use Quartus II software, or if you have some idea of Quartus II software, but would like to learn more about its capabilities, then this manual is for you.
Update : 2024-05-19 Size : 3096576 Publisher : 倪萍波
【VHDL-FPGA-Verilog】 AlteraFPGA DL : 0: quartus II 软件入门和进阶，是《ALtera fpga_cpld 设计》（基础篇）-quartus II software, introductory and advanced, is " ALtera fpga_cpld design" (Basics)
Update : 2024-05-19 Size : 22313984 Publisher : 孙楠
【VHDL-FPGA-Verilog】 HelloLED DL : 0: nios下实现helloled灯点亮用vhdl语言编写 quartus环境实现-nios achieve helloled lamp lit environment with the vhdl language quartus to achieve
Update : 2024-05-19 Size : 3974144 Publisher : PETER
【VHDL-FPGA-Verilog】 USB2.0 DL : 1: usb2.0 fpga程序用vhdl语言编写 quartus环境实现 -usb2.0 fpga using vhdl language program quartus environment to achieve
Update : 2024-05-19 Size : 3567616 Publisher : PETER
【Other】 Crack_QII70 DL : 0: Quartus II 7.0 crack
Update : 2024-05-19 Size : 6144 Publisher : Sealet
【Other Games】 lcdlab1 DL : 0: this the quartus program that for testing the lcd is workable in de2 board-this is the quartus program that for testing the lcd is workable in de2 board
Update : 2024-05-19 Size : 5120 Publisher : clement
【VHDL-FPGA-Verilog】 components DL : 0: quartus的几个IP核（PWM,RAM,I2C）-quartus several IP core (PWM, RAM, I2C)
Update : 2024-05-19 Size : 226304 Publisher : 宋瑞
【VHDL-FPGA-Verilog】 fpga-pwm DL : 1: 用verilog 语言写的FPGA子程序，环境是quartus II 7.2 已经在EP1C6Q240上测试过，源码包含仿真文件和仿真结果，本程序可以直接嵌入做子程序使用。-FPGA with the verilog language written subroutines, the environment is quartus II 7.2 has been tested on EP1C6Q240, source code contains the simulation files and simulation results, this procedure can be embedded directly used to do routines.
Update : 2024-05-19 Size : 1163264 Publisher : 黄家武
【Other】 lcd2tft DL : 0: convert lcd 4 bits to tft 16 bits.Writen verilog,Altera Quartus.
Update : 2024-05-19 Size : 816128 Publisher : ulsonic
【Other】 Crack_patch_license DL : 0: Quartus II 6.0 破解补丁和license设置-Quartus II 6.0 crack patch and license settings
Update : 2024-05-19 Size : 5120 Publisher : jjx

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