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【Other】 5-9--14 DL : 0: we address the design of economical recursive generalized comb filters (GCFs) by proposing an ef- ficient technique to quantize the multipliers in the z-transfer function employing power-of-2 (PO2) terms. GCFs are efficient anti-aliasing decimation filters with improved selectivity and quantization noise rejection performance around the so-called folding bands with respect to classical comb filters. The proposed quantization technique guarantees perfect pole–zero cancelation in the rational z-transfer function of the GCFs, thus totally avoiding instability problems. Moreover, we propose the use of a simple droop compensator for the sake of recovering the passband droop distorting the useful digital signal in the baseband. A design example is proposed with the aim of showing the application of the proposed technique, and a practical architecture of a sample third-order GCF is discussed.
Update : 2024-04-28 Size : 2818048 Publisher : muthupandy
【Crack Hack】 06168353 DL : 0: The Fast Fourier Transform (FFT) is one of the rudimentary operations in field of digital signal and image processing. Some of the very vital applications of the fast fourier transform include Signal analysis, Sound filtering, Data compression, Partial differential equations, Multiplication of large integers, Image filtering etc.Fast Fourier transform (FFT) is an efficient implementation of the discrete Fourier transform (DFT). This paper concentrates on the development of the Fast Fourier Transform (FFT), based on Decimation-In- Time (DIT) domain, Radix-2 algorithm, this paper uses VHDL as a design entity, and their Synthesis by Xilinx Synthesis Tool on Vertex kit has been done. The input of Fast Fourier transform has been given by a PS2 KEYBOARD using a testbench and output has been displayed using the waveforms on the Xilinx Design Suite 12.1.The synthesis results show that the computation for calculating the 32-point Fast Fourier transform is efficient in terms of speed.
Update : 2024-04-28 Size : 305152 Publisher : doggaravi
【VHDL-FPGA-Verilog】 duoxiangchouqu DL : 0: 该程序采用多相分解方式实现的抽取器滤波器，该抽取器的运行速度要比向下采样器的通常FIR滤波器的速度快R倍。-The program uses polyphase decomposition way to achieve the decimation filter, the speed of the extractor runs faster than the down sampler of the FIR filter is generally faster R times.
Update : 2024-04-28 Size : 1024 Publisher : yang
【Audio program】 FilterDesign01 DL : 0: 变采样和多相滤波器的实现。本程序实现了一个变采样程序，中间设计滤波器设计和插值抽取。其中滤波器设计用的是窗函数法，根据要求设计窗函数，得到窗函数的长度。接着是插值，滤波，抽取，得到最后变采样之后的波形文件、另外对比了用直接卷积和多相分解卷积两种方法最后的结果。 -Implementation of variable sampling and polyphase filter. This procedure implements a variable sampling procedures, intermediate design and interpolation and decimation filter design. The filter design is using the window function method, according to the requirements of the design of window function, get the length of the window function. Then the interpolation, filtering, extraction, and finally obtain the variable wave file, sampling after the addition of contrast and polyphase decomposition results of two methods for convolution last direct convolution.
Update : 2024-04-28 Size : 261120 Publisher : 袁斌
【3D Graphic】 DecimateVTK DL : 0: 基于WildMagic5以及VTK的网格精简。-Grid decimation function based on WildMagic5 and VTK
Update : 2024-04-28 Size : 2048 Publisher : 刘刚
【VHDL-FPGA-Verilog】 scr DL : 0: 4阶24倍抽取CIC滤波器设计-4th order 24 times CIC decimation filter design
Update : 2024-04-28 Size : 11264 Publisher : 李林
【Linux-Unix】 sc DL : 0: set the horizontal scaler coefficients according to the ratio of output to input widths, after accounting for up to two levels of decimation.
Update : 2024-04-28 Size : 4096 Publisher : congqinru
【VHDL-FPGA-Verilog】 filter_VHDL DL : 1: FIR filter design using VHDL for 32 bit signed coefficientand 32 bit input and decimation is 4 and its working good
Update : 2024-04-28 Size : 50176 Publisher : shyamu
【VHDL-FPGA-Verilog】 fft DL : 0: 实现功能：基8实现64点FFT处理器（进行两次8点FFT计算，采用基8进行64点）详细说明：硬件结构包括六部分，分别为输入模块、8点FFT模块、乘法模块、顺序调整模块、输出模块和总控制模块。其中，输入模块的主要功能是将串行输入的64个数据进行分类，分成8批次，每次8个输入到8点FFT模块中进行计算。 8点FFT模块：FFT是DFT的快速算法，当点数较大时，可以较大的减少DFT的运算量。常用的FFT算法主要有两种，分别为按时间抽选的FFT算法（DIT-FFT）和按频率抽选的FFT算法（DIF-FFT）。在我们的设计中，我们采用的是按频率抽选的8点FFT算法。乘法模块：由于旋转因子的对称性，只需要产生8个常数因子即可。但这样会复用一些单元，从而影响运算速度，为了提高计算速度，我们分析时序情况，增加了一些单元，以实现输入数据到达之后就可以进行运算。顺序调整模块是将第一级FFT出来的数据顺序进行调整并输出到下一级FFT模块中进行计算，数据的顺序调整情况类似于输入模块，每隔8个数取一个输出。输出模块：由于第二级FFT模块输出数据顺序不符合实际要求，因此需要调整数据的顺序，从而使64个输出数据安装顺序串行输出，结构类似于输入模块，区别只是输入变为8个数据并行，输出为一个数据串行。-Function: base 8 implement 64-point FFT processor (twice 8:00 FFT calculation, using the base 8 of 64 points) Description: The hardware configuration consists of six parts, namely, an input module, 8-point FFT module, multiplication module, order adjustment module, the output module and total control module. Among them, the 64 data input module is the main function of the serial input classification, divided into eight lots, each 8 inputs and 8-point FFT module calculation. 8:00 FFT module: FFT is a fast algorithm for DFT, when a large number of points, you can greatly reduce the amount of computation of the DFT. FFT algorithm commonly used mainly two were decimated by time FFT algorithm (DIT-FFT) algorithms and FFT decimation in frequency (DIF-FFT). In our design, we have adopted is based on the frequency of lottery 8:00 FFT algorithm. Multiplication module: Since rotational symmetry factor, you only need to generate 8 constant factor. But it will reuse some of the units, which af
Update : 2024-04-28 Size : 32768 Publisher : 李圣华
【matlab】 whole_band_sampling DL : 0: 若干个单频和信号分布在0—1000Hz的全频段内，设计滤波器分离10个单频信号，再进行抽取-Some single-frequency and signal distribution within 0-1000Hz full-band design filter separating 10 single-frequency signal, then decimation
Update : 2024-04-28 Size : 1024 Publisher : yaota
【Linux-Unix】 complex_bit_reverse DL : 0: decimation in time - re-order data.
Update : 2024-04-28 Size : 1024 Publisher : ddcgbu
【Other】 cic DL : 0: CIC Filter 实现的matlab源码.里面使用MATLAB，verilog，c++混合实现CIC抽取滤波器-CIC Filter achieve matlab source. Inside using MATLAB, verilog, c++ hybrid implementation CIC decimation filter
Update : 2024-04-28 Size : 290816 Publisher : 李瑞涛
【DSP program】 fwdmatlaband6713 DL : 0: Matlab codes for decimation, interpolation, histogram equalization, DCT, DWT. Matlab code for Hamming code generation and error correction. Sample C codes for DSP downsampling and upsampling. They all include output and graphs.
Update : 2024-04-28 Size : 1038336 Publisher : ad
【MiddleWare】 CIC-Filter DL : 0: 抽取滤波器的matlab源代码实现预仿真，修改参数即可使用-Decimation filter matlab source code to achieve the pre-simulation can be used to modify the parameters
Update : 2024-04-28 Size : 1024 Publisher : 董伟忠
【Wavelet】 WaveShow DL : 0: 介绍了采用离散傅立叶变换（DFT）实现对采样得到的波形数据文件进行频谱分析的一般方法，并且为了提高运算效率、节省中间存储单元，最终采用了时间抽选奇偶分解的库利-图基算法实现快速离散傅立叶变换，对采样数据进行了高效的频谱分析，并用Microsoft Visual C++ 6.0编写实现-Introduced the discrete Fourier transform (DFT) is a general method of the spectrum analysis of the sampled waveform data file, and in order to improve the operational efficiency and save the intermediate storage unit, culminating in the adoption of the decimation in time parity decomposition of the Cooley Tukey algorithm to realize the fast discrete Fourier transform, the sampling data of efficient spectrum analysis, and Microsoft Visual C++ 6.0 to programmed
Update : 2024-04-28 Size : 44032 Publisher : gaolou
【VHDL-FPGA-Verilog】 CIC_verilog DL : 0: 采用verilog实现的三级CIC抽取器，输入8位数据，输出26位数据，使用有限状态机用于实现下采样，包括积分器实现模块和梳状器实现模块-Using verilog to achieve three CIC decimation filter, the input 8-bit data output 26-bit data, the use of finite state machines for sampling, including the integrator and comb to implement the module is implemented to achieve the next module
Update : 2024-04-28 Size : 1024 Publisher : 刘建涛
【DSP program】 9375_code_test DL : 0: 基于DSP实现信号的多抽样率信号处理，内插和抽取-DSP for signal of multirate signal processing based on the interpolation and decimation
Update : 2024-04-28 Size : 33792 Publisher : Neil Stallman
【matlab】 DemosWeek1 DL : 0: demos of prossing sinals, interpoletion decimation
Update : 2024-04-28 Size : 12288 Publisher : jéssica
【Other systems】 fft DL : 0: FFT Decimation in Time C Source Code
Update : 2024-04-28 Size : 5120 Publisher : Jason
【Other】 STM32CubeExpansion_MEMSMIC1_V1.1 DL : 0: This document provides a description of the microphone streaming application based on Nucleo boards and X-NUCLEO-CCA02M1 expansion board. It allows acquisition of up to 4 digital MEMS microphones, PDM to PCM decimation and streaming towards a host PC via a dedicated USB Audio Input driver.
Update : 2024-04-28 Size : 16050176 Publisher : gpio

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