Search - decimation

Search - decimation - List

【3G develop】 new1 DL : 0: clc clear number of subbands K = 32 oversampling ratio O = 2 decimation rate D = K/O number of taps per polyphase component P = 3 total prototype filter length is L = D*P prototype filter-clc clear number of subbands K = 32 oversampling ratio O = 2 decimation rate D = K/O number of taps per polyphase component P = 3 total prototype filter length is L = D*P prototype filter
Update : 2024-04-28 Size : 2048 Publisher : ylt_9811115
【Delphi/CppBuilder】 oo DL : 0: 将一个十进制数按倒序形式输出，即，若输入1234，则输出4321。（提示：实现的方法是将一个十进制数不断除以十取余，并马上输出该余数）-A decimal number reverse form of output, that is, if the input 1234, output 4321. (Hint: the realization of the method is a decimal number divided by the decimation I constantly and immediately output the remainder)
Update : 2024-04-28 Size : 11264 Publisher : 毕影全
【Linux-Unix】 decim54 DL : 0: Description:Decimation of 16kHz signal to 12.8kHz.
Update : 2024-04-28 Size : 2048 Publisher : xofonre
【VHDL-FPGA-Verilog】 24CIC DL : 0: 基于fpga的抽取CIC滤波器设计,采用verilog编写，24抽取,仿真通过-Fpga-based CIC decimation filter design using verilog written, 24 extraction
Update : 2024-04-28 Size : 3638272 Publisher : zengdeqian
【Other】 fft_DIF_R2_eML DL : 0: matlab simulink file for calculating decimation in frequency radix-2 fft
Update : 2024-04-28 Size : 23552 Publisher : suha
【File Format】 DIT-radix-2 DL : 0: decimation in time radix-2 fft document in pdf containing source code in c language
Update : 2024-04-28 Size : 171008 Publisher : suha
【matlab】 ciccomp DL : 0: 本代码可以实现CIC的抽取滤波功能，性能很好-This code implements the CIC decimation function, performance is very good
Update : 2024-04-28 Size : 1024 Publisher : lishuang
【VHDL-FPGA-Verilog】 CIC_filter_implement DL : 0: 实现CIC抽取滤波器，在多速率通信中经常需要用到的CIC抽取滤波器-CIC decimation filter implemented in the multi-rate communications often need to use the CIC decimation filter
Update : 2024-04-28 Size : 163840 Publisher : 雷
【Other】 Calibration-Routines DL : 0: In order to achieve the best possible performance, offset and gain can be often be calibrated in high-resolution analog-to-digital converters (ADCs). Changes in temperature, PGA gain, power supply voltage, or most importantly, decimation ratio can influence the accuracy of measurement. This application note explains how the calibration routines work and how to generate values for the full-scale register (FSR) and the offset calibration register (OCR) in the ADS1216, ADS1217, and ADS1218 family of ADCs.
Update : 2024-04-28 Size : 190464 Publisher : joelyu
【VHDL-FPGA-Verilog】 CIC_4ORDER DL : 0: 4阶24倍抽取CIC滤波器的verilogHDL源代码，仿真测试代码及相关资料-4-order CIC decimation filter 24 times verilogHDL source code, simulation test code and related information
Update : 2024-04-28 Size : 3624960 Publisher : 丛梦龙
【matlab】 Decimation DL : 0: 软件无线电中的信号抽取程序，包括抽取后的频谱分析-software radio signal extraction procedures, including spectral analysis after extraction
Update : 2024-04-28 Size : 2048 Publisher : guolu
【matlab】 1001-0548(2012)02-0208-04 DL : 0: 宽带CIC抽取滤波器的一种改进方法1001-0548(2012)02-0208-04-Improved Method for Wideband CIC Decimation Filters
Update : 2024-04-28 Size : 519168 Publisher : wang
【Software Engineering】 pudn DL : 0: The program is about designing chebychev digital filter,butterworth filter,decimation program
Update : 2024-04-28 Size : 122880 Publisher : vanitha
【Special Effects】 qam128main DL : 0: 信号处理设计，包括下变频，抽取滤波，同步，均衡等模块，对加扰QPSK信号进行解调设计。-Signal processing design, including down-conversion, decimation filtering, synchronization, equalization module, scrambled QPSK signal is demodulated design.
Update : 2024-04-28 Size : 2048 Publisher : 陈敏
【VHDL-FPGA-Verilog】 code-pour-decim-poly DL : 0: this code is for a decimation filter with polyphase structure , so the original filter is decomposed by 5 filters which is the decimation factor in that case and each of them is selected each Fs/5
Update : 2024-04-28 Size : 23552 Publisher : lassana
【Other】 Speech-signal-processing-source-code DL : 0: 对语音信号进行采样率的转换，如整数倍的内插和抽取，还可以进行非整数倍的采样率转换。-The sampling rate of the voice signal conversion, such as interpolation and decimation integer multiple of, can also be a non-integer multiple of the sampling rate conversion.
Update : 2024-04-28 Size : 5120 Publisher : 张辉
【matlab】 New_FFT_DIF DL : 0: 该程序实现序列的快速傅里叶变换，并且它是属于基-2 FFT中的按频率抽选的FFT运算程序-The Fast Fourier Transform program sequence, and it belongs to the group-2 FFT decimation in frequency FFT operation program
Update : 2024-04-28 Size : 2048 Publisher : jun dong
【VHDL-FPGA-Verilog】 cic_cq DL : 0: 在altera平台用verilog硬件描述语言实现cic抽取滤波，包含完整的工程代码，已经仿真通过，可以直接用于实践-In the Altera platform using Verilog hardware description language CIC decimation filter, contains the complete project code, has been adopted by simulation, can be used directly in practice
Update : 2024-04-28 Size : 1182720 Publisher : 汪少锋
【Windows Develop】 matlab-MRF-examples DL : 0: 我们将他引入，形成了基于信息传递的大毁灭算法和警示传播算法。-generate a decimation algorithm and warning propagation algorithm.
Update : 2024-04-28 Size : 20480 Publisher : 李树
【Other】 dspinter DL : 0: 利用MATLAB软件实现多速率中的抽取与内插-MATLAB realization of multi-rate decimation and interpolation
Update : 2024-04-28 Size : 1024 Publisher : xin fang

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