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【SCM】 ds18b20-read-rom DL : 0: 本代码能够测取DS18B20的ROM序列号，在开发多18B20传感器的时候，便于开发人员很快的读取到序列号，并把传感器挂至总线上。-This code can be measured DS18B20 take ROM serial number, and in the development of multi-18B20 sensor, easy for developers to quickly read the serial number, and the sensor is linked to the bus.
Update : 2024-05-20 Size : 28672 Publisher : 寇水潮
【VHDL-FPGA-Verilog】 rom DL : 0: vhdl veri log rom file
Update : 2024-05-20 Size : 1024 Publisher : adze
【Other Embeded program】 ROM-PLA-and-VHDL-examples DL : 0: ROM PLA and VHDL examples
Update : 2024-05-20 Size : 380928 Publisher : nk7
【Linux-Unix】 rom DL : 0: pci_enable_rom - enable ROM decoding for a PCI device.
Update : 2024-05-20 Size : 2048 Publisher : xjfenny
【Linux-Unix】 omap3-rom-rng DL : 0: omap3-rom-rng.c - RNG driver for TI OMAP3 CPU family.
Update : 2024-05-20 Size : 1024 Publisher : dxsuvp
【Other】 ROM-DOS_Developers_Guide DL : 0: ROM-DOS Developers Guide Datalight
Update : 2024-05-20 Size : 947200 Publisher : Andrejo
【VHDL-FPGA-Verilog】 multiplier-ROM--FIFO-memory DL : 0: 布斯，阵列乘法器，加减交替除法器，以及ROM存储器，FIFO存储器-Booth, array multiplier, divider alternately add and subtract, and ROM memory, FIFO memory
Update : 2024-05-20 Size : 19456 Publisher : ZY
【Other】 Control-CD-ROM-drive DL : 0: Control CD-ROM drive控制光碟機開關源碼-Control CD-ROM drive
Update : 2024-05-20 Size : 2048 Publisher : 林奕樊
【Other Embeded program】 ROM DL : 0: 用十六乘八的rom,通过元件例化，以及四，十六译码器，设计出二百五十六乘八的ROM-With sixteen by eight of rom, by component instantiation, and four, sixteen decoder, designed by eight of the two hundred fifty-six ROM
Update : 2024-05-20 Size : 1660928 Publisher : 刘文洁
【Software Engineering】 ROM DL : 0: ROM simulation code for fpga
Update : 2024-05-20 Size : 1024 Publisher : Hassan A Anzarouti
【ELanguage】 240188modified-rom-based-logic DL : 0: Modified rom based logic
Update : 2024-05-20 Size : 12288 Publisher : Deepak
【VHDL-FPGA-Verilog】 rom DL : 0: 生成rom的代码-The code generated rom.。。。。。。。。。。。
Update : 2024-05-20 Size : 1024 Publisher : zyz
【VHDL-FPGA-Verilog】 31-x-8-ROM-master DL : 0: Verilog module for a ROM. The rom needs to be able to hold 32 unsigned Integers each 8 Bits. Thus it must have32 address lines.
Update : 2024-05-20 Size : 1024 Publisher : 小海豚
【Software Engineering】 ROM-with-I2C DL : 0: This code in C language is a source code for interfacing of 8051 uC with ROM , storing data in ROM and then displaying it on LCD after reading it
Update : 2024-05-20 Size : 2048 Publisher : ashish
【VHDL-FPGA-Verilog】 ROM DL : 0: 使用verilog语言实现对altera下cycloneII系列FPGA的片上ROM的创建，读写，调用IP核-Use verilog language to achieve altera under the cycloneII series FPGA on-chip ROM to create, read and write, call IP core
Update : 2024-05-20 Size : 36864 Publisher : 张仑仑
【VHDL-FPGA-Verilog】 blockRomTest DL : 0: it is a rom with vhdl
Update : 2024-05-20 Size : 3885056 Publisher : farzam
【Other】 BlueCore6-ROM-Module DL : 0: BlueCore6-ROM-Module.zip Opendous Inc.'s OpenHardware designs that are designed and developed using Free and Open Source Software.
Update : 2024-05-20 Size : 193536 Publisher : hahn.jens67
【Other】 ROM_test DL : 0: 使用quartus调用ROM的IP核，并生成激励文件进行仿真(Use the quartus call ROM IP kernel, and generate incentive files for simulation.)
Update : 2024-05-20 Size : 3265536 Publisher : XHF72
【VHDL-FPGA-Verilog】 11_rom_test DL : 0: 利用.mif文件产生rom表。完成rom的存储和读取(Using the.Mif file to generate the ROM table. Complete the storage and read of ROM)
Update : 2024-05-20 Size : 8616960 Publisher : 我爱程序员
【Other】 TesteROM DL : 0: ROM Test - VHDL Project
Update : 2024-05-20 Size : 403456 Publisher : HotavioH

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