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【Other resource】 deinterlace DL : 0: Xilinx提供的一种利用线缓存进行插值的隔行变逐行程序，比普通算法效果有很大改进。-Xilinx to provide a linear interpolation for the cache interlaced progressive change procedures, than ordinary algorithm results are greatly improved.
Update : 2008-10-13 Size : 99140 Publisher : cloud
【Other resource】 pic16f84 DL : 0: pic MCU的HDL语言代码，实现器件是Xilinx FPGA,经过验证和测试-pic MCU HDL code, is the realization of Xilinx FPGA devices. After testing and validation
Update : 2008-10-13 Size : 48299 Publisher : 钟方
【Other resource】 PCI_Bridge_Guest_UART DL : 1: 这是用pci-wishbone核和16450串口核在xilinx的fpga上实现的串口程序，用verilog实现，ise7.1，不知道这里可不可以上传硬件的程序~-pci-wishbone nuclear and nuclear Serial 16,450 in the TP xilinx They achieved a serial program, verilog realization ise7.1. Can here do not know the procedures upload hardware ~
Update : 2008-10-13 Size : 8428033 Publisher : heartbeat
【Other resource】 ISE8.1_loopback DL : 0: 硬件平台为Xilinx Spartan3e，编译软件为ISE8.1，实现了九针com口通信，键盘输入回显，switch控制LED功能。-hardware platform for Xilinx Spartan3e, compile software ISE8.1. achieved nine needles com port communication, a return to the keyboard input, LED control switch function.
Update : 2008-10-13 Size : 23372 Publisher : Lincker
【Other】 lab1ppc DL : 0: 嵌入式文档：Xilinx EDK 实验教程1： Simple Hardware Design-Embedded Document : Xilinx EDK an experimental Guide : Simple Hardware Design
Update : 2008-10-13 Size : 1758731 Publisher : Lincker
【Other】 lab2ppc DL : 0: 嵌入式文档：Xilinx EDK 实验教程3： Adding Custom IP to an Embedded System Lab:-Embedded Document : Xilinx EDK three experimental Guide : Adding Custom IP to an Embedded System Lab :
Update : 2008-10-13 Size : 2028582 Publisher : Lincker
【Other】 lab4ppc DL : 0: 嵌入式教程：Xilinx Spartan3e 开发环境：EDK 实验教程4：Writing Basic Software Applications -Embedded Tutorial : Xilinx Spartan3e development environment : EDK experimental Guide 4 : Writing Basic Software Applications
Update : 2008-10-13 Size : 1597864 Publisher : David
【Other】 lab5ppc DL : 0: 嵌入式教程：Xilinx Spartan3e 开发环境：EDK 实验教程4：SDK Lab PowerPC Processor -Embedded Tutorial : Xilinx Spartan3e development environment : EDK experimental Guide 4 : SDK Lab PowerPC Processor
Update : 2008-10-13 Size : 2592523 Publisher : David
【Other resource】 WmzjfLvQ DL : 0: Xilinx配置入门指南适用于初学者-Xilinx Configuration Getting Started Guide applicable to beginners
Update : 2008-10-13 Size : 354094 Publisher : 林涛
【Other】 XC4000 DL : 0: Xilinx公司XC4000系列参考手册-company Xilinx XC4000 series of reference manual
Update : 2008-10-13 Size : 118574 Publisher : qipeihong
【Other】 liftor DL : 0: 基于VHDL语言的实用电梯控制器的设计源程序经Xilinx公司的Foundation软件仿真 -based on VHDL practical elevator controller design source by Xilinx's Foun dation Simulation Software
Update : 2008-10-13 Size : 2119 Publisher : 杨洋
【Other resource】 bujindianjiVHDL DL : 0: 步进电机定位控制系统VHDL程序与仿真波形．已经在xilinx ISE 8.1上验证．完全正确．-positioning stepper motor control system procedures and VHDL simulation waveform. Xilinx ISE has tested 8.1. Absolutely correct.
Update : 2008-10-13 Size : 4965 Publisher : 罗辉
【Other resource】 sampleVHDL DL : 0: 采样等精度测量的VHDL程序．．在xilinx ISE 8.1上验证通过-sampling and other precision measurement of VHDL program. . In xilinx ISE tested through 8.1.
Update : 2008-10-13 Size : 123595 Publisher : 罗辉
【Communication】 studyXilinxFPGAintenminitues DL : 0: 十分钟学会Xilinx FPGA 设计1.1，内容明了，推荐-10 minutes Society Xilinx FPGA Design 1.1, as clear recommendation
Update : 2008-10-13 Size : 1736385 Publisher : 毛毛
【Other resource】 xilinx_ise_edk8.1_register DL : 0: xilinx ise edk8.1注册器-xilinx ise edk8.1 for registration
Update : 2008-10-13 Size : 65427 Publisher : 张菊兰
【WEB Code】 eb894854-c49f-4ba1-a258-411bc31cf6eb DL : 0: 介绍了基于FPGA的多功能计程车计价器的电路设计。该设计采用了可编程逻辑器件FPGA的ASIC设计，并基于超高速硬件描述语言VHDL在Xilinx公司的SpartanⅡ系列的2sc200PQ208-5芯片上编程实现了整个系统的控制部分，整个自动控制系统由四个模块构成：秒分频模块、控制模块、计量模块和译码显示模块。该设计不仅仅实现了显示计程车计费的功能，其多功能表现在它可以通过选择键选择显示计程车累计走的总路程和乘客乘载的时间。计时、计程、计费准确可靠，应用于实际当中有较好的实用价值和较高的可行性-introduced FPGA-based multifunctional taxi meter circuit design. The design using programmable logic device FPGA ASIC design, and for the super-high-speed VHDL hardware description language in the company Xilinx Spartan II Series 2 sc 200PQ208-5 chip programming of the control system as a whole, Automatic control the entire system from four modules : a seconds-frequency module, control module, metrology modules and decoding module. The design not only achieved a taxi showed Billing functions, Multifunctional its performance through its keypad revealed taxi taking the cumulative total journey of the passengers took the set time. Program, log, billing is accurate, reliable and practical application of them have good practical value and the higher the feasibility
Update : 2008-10-13 Size : 8456 Publisher : 石头
【Other resource】 my_fifo_vhdl DL : 0: XILINX的FPGA实现的双口ram源码，可作为dsp\\SDRAM和pci桥接作用，可直接使用，实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \\ SDRAM and pci bridge, and can be used directly, through practical projects.
Update : 2008-10-13 Size : 19762 Publisher : 朱效志
【Other resource】 adder_Xilinx_Spartan_3 DL : 0: 这是个基于 Xilinx Spartan3 的加法器，利用Verilog语言编写，对于EDA初学者来说有一定的参考价值。 -This is based on the Xilinx Spartan3 Adder, Verilog language use, EDA newcomer has some reference value.
Update : 2008-10-13 Size : 80508 Publisher : tangxiaobin
【OS Develop】 jsjktbg1_mydown0315 DL : 0: xilinx ddr controler
Update : 2008-10-13 Size : 11756 Publisher : lanse
【Other resource】 ClockDiv DL : 0: 本程序以XILINX公司的ISE８.２为开发平台，采用VHDL为开发语言，实现了对一个时钟信号分频的功能-the procedures to XILINX ISE8.2 for the development platform VHDL used for the development of language, the right to achieve a clock frequency of the signal function
Update : 2008-10-13 Size : 774440 Publisher : 刘小军

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