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对芯片ti6713的存储器的存储初时化程序。包括sdram和flash存储器。能够实现高所存储数据功能。-On-chip memory storage ti6713 initial procedure. Including SDRAM and flash memory. To achieve higher data storage function.
Update : 2024-05-19 Size : 312320 Publisher : 占敖

包含原理图、源程序与详细操作说明 汇编语言编写-Includes schematics, source code and detailed instructions compiled languages
Update : 2024-05-19 Size : 97280 Publisher : zdy

DL : 0
jesd 组织的DDR SDRAM规范,希望对你有所帮助-DDR SDRAM Organization jesd norms, and they hope to help you
Update : 2024-05-19 Size : 939008 Publisher : feng

实验源码是2410完全开发用的,通过此源码实验初学者可以一步步步入arm开发的殿堂。 源码包括:led点亮、key、stdio操作以及nand和sdram操作控制等。-Experimental source is fully developed by 2410, and through this source beginners can experiment step by step into the development arm of the hall. Source include: led lighting, key, stdio operations, as well as NAND and SDRAM operation control.
Update : 2024-05-19 Size : 334848 Publisher : kangyulu

一篇讲解ALTERA的FPGA如何实现SDR SRAM的指导文章。很有指导意义。-ALTERA s FPGA on a how to achieve the guidance of SDR SRAM articles. Great guiding significance.
Update : 2024-05-19 Size : 701440 Publisher : kurt

CAN总线资料, CAN.sch 是protel99se格式文件 CPLD目录是7032的CPLD工程,使用MAX+PULS10.0 test目录是程序工程目录,使用ADS1.2编译该工程,load到SDRAM调试-err
Update : 2024-05-19 Size : 220160 Publisher : pangbai

该项对于设计DDSRAM有很大的帮助,希望可以对你有所帮助。-For the design of the DDSRAM have great help, I hope you can help.
Update : 2024-05-19 Size : 474112 Publisher : 王辉

Bootloader from sdram, flash 烧写-Bootloader from sdram, flash programmer
Update : 2024-05-19 Size : 600064 Publisher : 沈烈

(1)个人针对atmel提供的运行于CPU内13k空间的ram的romboot修改而成。 (2)提供了IRQ和FIQ的测试工作; (3)提供了对外部sdram的数据总线和地址总线的测试工作 (3)提供了对spi dataflash和nor flash的访问操作 (4)实现了romboot在spi dataflash和nor flash中的升级 (5)因为受编译后文件不能超过13kbytes的限制,采用条件编译的方法控制各个功能-(1) individuals provided for Atmel running on the CPU with 13k of ram space romboot modified form. (2) provides the IRQ and FIQ testing (3) provide for external SDRAM data bus and address bus of the test (3) provides a spi dataflash and visit nor flash operations (4) realize the romboot in spi dataflash and nor flash the upgrade (5) because of the compiled files should not exceed 13kbytes restrictions, conditions compiled using various functional control
Update : 2024-05-19 Size : 299008 Publisher : yan_jordan

DDR2 的控制器,它是由LATTICE的编译器生成。-DDR2 controller, it is by the compiler-generated LATTICE.
Update : 2024-05-19 Size : 966656 Publisher : 李国

这是关于动态存储器的一个程序,对与学习ARM的存储设备有好处-This is on the dynamic memory of a process, and learning on the storage devices will benefit ARM
Update : 2024-05-19 Size : 19456 Publisher : goege

xst3_video.ZIP是基于XILINX的XST3开发板的视频采集源码,里面有SDRAM control-xst3_video.ZIP is based on the XILINX
Update : 2024-05-19 Size : 162816 Publisher : 李斌

前段时间,写了一个简单直接的 4510B bootloader 用来装载 uclinux 内核。在这篇文档 里,我将结合源代码介绍一下 4510 Bootloader 的实现和分析。源代码很简单很直接,希 望对初学的朋友有点帮助。也许在分析中有很多错误,希望大家能够指正,共同进步。 Bootloader 的实现基于三星4510B,假设开发板上有2M 的Flash 作为Boot rom,SDRAM 的大小是16M。开发环境是ADS1.2 。
Update : 2024-05-19 Size : 2472960 Publisher : 任海林

基于erilog语言的sdram内部结构及时序图(全英文版的)-Erilog language based on the internal structure of the SDRAM timing diagram (all in English)
Update : 2024-05-19 Size : 184320 Publisher : cw

This application creates an USB Mass Storage drive on a host computer. The drive is created from the internal Flash or external SDRAM memory of the evaluation kit. -This application creates an USB Mass Storage drive on a host computer. The drive is created from the internal Flash or external SDRAM memory of the evaluation kit.
Update : 2024-05-19 Size : 345088 Publisher : tangxiaozheng

北京瑞泰TMS320C6713板SDRAM测试程序-Beijing Ruitai TMS320C6713 board SDRAM test procedures
Update : 2024-05-19 Size : 164864 Publisher : tuweiping

用的是三星的S3C44B0X,板子上有8M SDRAM、2M NOR FLASH、16M NAND FLASH、USB接口和两个串口 5-Using a Samsung S3C44B0X, board have 8M SDRAM, 2M NOR FLASH, 16M NAND FLASH, USB interface and two serial 5
Update : 2024-05-19 Size : 2971648 Publisher : 陈晓东

同步动态RAM的控制电路VHDL源代码,在SOC开发中可以直接应用-Synchronous Dynamic RAM control circuit VHDL source code, in the SOC development can be applied directly
Update : 2024-05-19 Size : 90112 Publisher : 26

FPGA的Nios配合时如何计算SDRAM相位的文章-FPGA co-ordination of the Nios how to calculate the phase-SDRAM article
Update : 2024-05-19 Size : 110592 Publisher : chen

s3c44b0 的开发板测试的所有源代码及程序!!!汇编代码主要完成系统初始化,包括: 禁止看门狗; 禁止所有中断; 初始化存储器(包括SDRAM); 设定锁相环倍频; 使能所有单元模块时钟; 初始化堆栈; 设置中断等等 C语言代码主要是应用代码,包括: 设置使用指令缓存; 修改系统主时钟为32MHz; IO端口功能、方向设定; 初始化中断; 初始化DMF50081液晶模块; 蜂鸣器测试; 液晶显示测试; LED输出测试; 定时器、PWM测试等;-S3C44B0 development board to test all source code and procedures! ! ! Assembly code to initialize the main complete system, including: the prohibition of watchdog ban all interrupted initialize memory (including SDRAM) set PLL multiplier so that all clock modules initialize stack settings interruption, etc. C language code is application code, including: the use of instruction cache settings modify the system master clock is 32MHz IO port functions, the direction of settings initialization interrupt DMF50081 LCD module initialization buzzer test LCD test LED output test timer, PWM testing
Update : 2024-05-19 Size : 4096 Publisher : 叶凌
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