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这是ATMEL公司的8位高档AVR单片机mega128的中文资料,简单扼要,用起来非常方便!-This is the company's eight luxury AVR mega128 the Chinese data, brief, and it is very convenient!
Update : 2024-05-20 Size : 2598912 Publisher :

DL : 0
详细介绍了S3C44B0CPU的引脚情况 还有内部存储器包括SDRAM和NOR FLASH的连线-S3C44B0CPU details of the situation is the internal pin including SDRAM memory and N FLASH OR connectivity
Update : 2024-05-20 Size : 38912 Publisher : songwenjuan

DM642开发板自带,包括音频,视频,SDRAM,UART等,此为其中之一。-DM642 development board to bring their own, including audio, video and SDRAM, UART, this is one of them.
Update : 2024-05-20 Size : 54272 Publisher : 赵钱孙

在at91sam7se系列中外扩sdram例子-at91sam7se Series in foreign expansion sdram example
Update : 2024-05-20 Size : 212992 Publisher :

44b0X开发板 CPU:S3C44B0X FLASH:HY29LV160BT 2M SDRAM:HY57V641620 8M 2 COM USB1.1 PDIUSBD12 NET RTL8019AS JTAG 14PIN LCD 接口 4 KEY-44b0X development board CPU : S3C44B0X FLASH : HY29LV160BT 2M SDRAM : HY57V641620 8M two COM USB1.1 PDIUSBD12 NET RTL80 19AS JTAG interface LCD 14PIN 4 KEY
Update : 2024-05-20 Size : 1082368 Publisher : 邹枫

SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating with a 100MHz Bus Clock. The rating is based on Dhrystone 2.1. It shows the rate when I+D Caches are disabled or enabled, with or without MMU and I Cache is disable or enabled, with or without MMU. -SAM9261 BasicMMU Example code with ADS1.2 (163 kB) The goal of this project is to show how to use a PC100 SDRAM and the MMU to perform a rating w praxiology a 100MHz Bus Clock. The rating is based on Dhr ystone 2.1. It shows the rate when I Caches are d D. isabled or enabled, with or without MMU and I Cache is disable or enab led, with or without MMU.
Update : 2024-05-20 Size : 424960 Publisher : 啊非

ddr and sdram memory check,ddr and sdram memory check-ddr sdram memory and check, ddr sdram memory check and
Update : 2024-05-20 Size : 136192 Publisher : wangdong

改成用philips的lpc2132来做控制,省去了SED1335和它配套的sdram-Replaced with the lpc2132 do philips control, eliminating the SED1335 and its supporting SDRAM
Update : 2024-05-20 Size : 748544 Publisher : linfengdu

This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy --adjust-vma=0x800000 output_file.hexout -O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec-This leon3 design is tailored to the Altera NiosII Startix2 Development board, with 16-bit DDR SDRAM and 2 Mbyte of SSRAM. As of this time, the DDR interface only works up to 120 MHz. At 130, DDR data can be read but not written. NOTE: the test bench cannot be simulated with DDR enabled because the Altera pads do not have the correct delay models. * How to program the flash prom with a FPGA programming file 1. Create a hex file of the programming file with Quartus. 2. Convert it to srecord and adjust the load address: objcopy--adjust-vma=0x800000 output_file.hexout-O srec fpga.srec 3. Program the flash memory using grmon: flash erase 0x800000 0xb00000 flash load fpga.srec
Update : 2024-05-20 Size : 114688 Publisher :

AT91RM9200控制SDRAM的程序ic42s324-AT91RM9200 procedures SDRAM control ic42s324
Update : 2024-05-20 Size : 326656 Publisher : weiwenhao

AT91RM9200的MMU调试,需要有外部的SDRAM芯片.ic42s324-AT91RM9200 the MMU debugging, need to have external SDRAM chip. Ic42s324
Update : 2024-05-20 Size : 199680 Publisher : weiwenhao

将SDRAM中数据通过DMA送至UART,可以通过串口助手查看数据.-To SDRAM data through DMA to the UART, can view data through the serial port aide.
Update : 2024-05-20 Size : 1024 Publisher : 许湘云

FPGA flash 编程序,使用CYCLONE和FLASH-FPGA flash-programmed, the use of CYCLONE and FLASH
Update : 2024-05-20 Size : 318464 Publisher : chunlin_lai

ARM7处理器的系统测试源码,汇编和C组成,具有norflash、nandflash、sdram、LCD、IIC、232、NET、USB、RLT等功能,可组成一个完整的处理终端,当然要有相应的硬件支持,供大家参考!-ARM7 processor system testing source code, compile and C composed norflash, nandflash, sdram, LCD, IIC, 232, NET, USB, RLT and other functions, can handle a complete end, of course, have corresponding hardware support for your information!
Update : 2024-05-20 Size : 1299456 Publisher : 牧羊犬

DL : 0
(原创)uboot在yl2410上的移植,此u-boot代码在sdram、norflash或nandflash上都可启动运行,附详细说明文档-(Original) uboot in yl2410 the transplant, the u-boot code in the sdram, norflash or the NANDFLASH can start running on the attached detailed description of the document
Update : 2024-05-20 Size : 6199296 Publisher : 阿里

Booksdsp
DL : 0
北京理工大学信号与信息处理DSP软硬件设计课件,挺好的。-Beijing Institute of Technology of Signal and Information Processing DSP software and hardware design courseware, quite good.
Update : 2024-05-20 Size : 26417152 Publisher : 杨奋燕

DL : 0
该程序为优龙IAR_LPC2468DEMO板上调通的,startup.s采用周立功给的,可能不支持SDRAM等下次调试好了再上传-The program for the gifted IAR_LPC2468DEMO Liuzhou
Update : 2024-05-20 Size : 177152 Publisher : SKY

该程序为优龙IAR_LPC2468DEMO板上调通的,startup.s采用周立功给的,可能不支持SDRAM等下次调试好了再上传 UCOSII2.83调试成功,可能有点BUG,先用了,LPC2468的资料比较少,先来充实一下,有问题联系我-The program for the gifted IAR_LPC2468DEMO Liuzhou
Update : 2024-05-20 Size : 475136 Publisher : SKY

ads1.2 下的EP9315的源代码(UART)-EP9315 under ads1.2 source code (UART)
Update : 2024-05-20 Size : 81920 Publisher : xuxuhuij

K5D5657ACA,三星258Mbit + 256 Mbit SDRAM,NAND芯片datasheet,可用于嵌入式方案.-K5D5657ACA, Samsung 258Mbit+ 256 Mbit SDRAM, NAND chip datasheet, can be used in embedded programs.
Update : 2024-05-20 Size : 1170432 Publisher : binch
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