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【Communication-Mobile】 UWBsimulator DL : 0: 自己编写的超宽带系统简单仿真平台，有简单界面.包括可替换的脉冲成型（半余弦脉冲）、IEEE802.15.3a的修正SV信道、最大似然信道估计、Rake接收机等模块，可以实现monte carlo仿真求误码率。可添加多址接入、编码等功能（维特比编解码、帧同步的程序由本人同学编写）。入口主程序uwbsim.m 编解码程序：bin2deci.m；bini2deci.m；deci2bin.m VITRBI.m 信道及信道估计：ch_est.m；channel.m；channelgenerator.m；conv_m. m；sigfold.m UWB_SV_channel.m uwb_sv_cnvrt_ct.m uwb_sv_eval_ct.m uwb_sv_model_ct.m uwb_sv_params.m Rake接收机：findpeak.m；MRC_combine.m；MRC_Rake.m；n_upsample.m；selectpath.m 其他：cnv_encd.m；dssignal.m；Eb_halfcos.m；waveshape.m；halfcos_generator.m；metric.m；nxt_stat.m；sim_main.m；spreadgren.m；test_code.m；training_ds.m；uwbsim.m；vit_test.m -own UWB prepared by the simple system simulation platform, A simple interface. including replacement of the pulse shaping (semi-cosine pulse). IEEE802.15.3a amendment SV Channel, the greatest likelihood channel estimation, the Rake receiver modules. can be achieved monte carlo simulation for BER. They can add multiple access, coding, and other functions (Viterbi codec, frame synchronization procedures prepared by my classmates). Edit the entrance uwbsim.m codecs : bin2deci.m; bini2deci.m; deci2bin.m VITRBI.m Channel and Channel Estimation : ch_est.m; channel.m; channelgenerator.m; conv_m. m; sigfold.m UWB_SV_channel.m uwb_sv_cnvrt_ct . m uwb_sv_eval_ct.m uwb_sv_model_ct.m uwb_s v_params.m Rake : findpeak.m; MRC_combine.m; MRC_Rake.m; n_upsample.m; selectpath.m Other : cnv_encd.m; dssignal.
Update : 2024-05-05 Size : 31744 Publisher : volvo827
【matlab】 pulse_simulation_of_LFM_radar DL : 0: 本软件是线性调频（LFM）脉冲压缩雷达仿真系统的一部分，具有典型性和实用性，希望对搞雷达仿真的朋友们有所帮助。-the software of linear frequency modulation (LFM) radar pulse compression part of the simulation system, classic and practicality, and I hope to engage the radar simulation friends help.
Update : 2024-05-05 Size : 151552 Publisher : 袁爽
【VHDL-FPGA-Verilog】 PulseWidth_detector_VHDL DL : 0: 通信控制中常用的脉冲宽度检测程序，VHDL模块化编成实现（原创）-communication control used in pulse width detection procedures, VHDL modular organization to achieve (original)
Update : 2024-05-05 Size : 1024 Publisher : 汤维
【VHDL-FPGA-Verilog】 9.1_ONE_PULSE DL : 0: 基于Verilog-HDL的硬件电路的实现 9.1 简单的可编程单脉冲发生器　　9.1.1 由系统功能描述时序关系　　9.1.2 流程图的设计　　9.1.3 系统功能描述　　9.1.4 逻辑框图　　9.1.5 延时模块的详细描述及仿真　　9.1.6 功能模块Verilog-HDL描述的模块化方法　　9.1.7 输入检测模块的详细描述及仿真　　9.1.8 计数模块的详细描述　　9.1.9 可编程单脉冲发生器的系统仿真　　9.1.10 可编程单脉冲发生器的硬件实现　　9.1.11 关于电路设计中常用的几个有关名词 -based on Verilog-HDL hardware Circuit of 9.1 simple programmable pulse generator 9.1.1 system functions described by the temporal flow chart 9.1.2 9.1.3 System Design Description logic diagram 9.1.5 9.1.4 Delay Module detailed description and simulation of 9.1. 6 functional modules Verilog-HDL description of the modular input method detection module 9.1.7 detailed 9.1.8 Description and Simulation module counting a detailed description 9.1.9 programmable pulse generator system 9.1.10 Simulation programmable pulse generator hardware on the circuit design 9.1.11 Constant Some of the terminology
Update : 2024-05-05 Size : 4096 Publisher : 宁宁
【VHDL-FPGA-Verilog】 9.3_Pulse_Counter DL : 0: 基于Verilog-HDL的硬件电路的实现 9.3 脉冲计数与显示　　9.3.1 脉冲计数器的工作原理　　9.3.2 计数模块的设计与实现　　9.3.3 parameter的使用方法　　9.3.4 repeat循环语句的使用方法　　9.3.5 系统函数$random的使用方法　　9.3.6 脉冲计数器的Verilog-HDL描述　　9.3.7 特定脉冲序列的发生　　9.3.8 脉冲计数器的硬件实现 -based on Verilog-HDL hardware Circuit of 9.3 pulse count and showed 9.3 .1 pulse counter the principle 9.3.2 Counting Module Design and Implementation para 9.3.3 meter usage 9.3.4 repeat cycle statement on the use 9.3.5- EC $ random function of the use of pulse counter 9.3.6 Verilog-HDL depiction 9.3.7 to specific pulse sequences occurred pulse counter 9.3.8 Hardware Implementation
Update : 2024-05-05 Size : 4096 Publisher : 宁宁
【VHDL-FPGA-Verilog】 9.5_PULSE_WIDTH DL : 0: 基于Verilog-HDL的硬件电路的实现 9.5 脉冲周期的测量与显示　　9.5.1 脉冲周期的测量原理　　9.5.2 周期计的工作原理　　9.5.3 周期测量模块的设计与实现　　9.5.4 forever循环语句的使用方法　　9.5.5 disable禁止语句的使用方法　　9.5.6 时标信号发生模块的设计与实现　　9.5.7 周期计的Verilog-HDL描述　　9.5.8 周期计的硬件实现　　9.5.9 周期测量模块的设计与实现之二　　　　9.5.10 改进型周期计的Verilog-HDL描述　　9.5.11 改进型周期计的硬件实现　　9.5.12 两种周期计的对比 -based on Verilog-HDL hardware Circuit of 9.5 pulse cycle of measurement and display 9.5.1 pulse cycle 9.5.2 cycle measurement principle, the principle 9.5.3 cycle measurement Module Design and Implementation 9.5.4 statement cycle forever the use 9.5.5 di sable statement ban on the use 9.5.6 at the beacon signal occurred Module Design and Implementation 9.5 .7 cycle of Verilog-HDL description 9.5.8 cycle of hardware 9.5. 9 cycle measurement module design and realization of two 9.5.10 Improved cycle of Verilog- HDL description 9.5.11 Improved cycle of hardware 9.5.12 two cycles of contrast
Update : 2024-05-05 Size : 5120 Publisher : 宁宁
【Communication-Mobile】 symbol_error_probability DL : 0: 多进制脉幅调制(M-PAM)和多进制脉位调制(M-PPM)的误码率分析-Multi-band pulse rate modulation (M-PAM) and the Multi-band pulse position modulation (M-PPM) BER analysis
Update : 2024-05-05 Size : 6144 Publisher : 陈陈
【source in ebook】 matlab300 DL : 0: PCM通信系统脉冲编码调制的信源编码，可以运行。模拟PCM的编码的波形！-PCM communication system pulse code modulation source coding, can run. Simulation of the PCM waveform coding!
Update : 2024-05-05 Size : 21504 Publisher : wstc
【Communication-Mobile】 pcm_chianelxie DL : 1: PCM（脉冲编码调制，包括A律和U律压缩等功能的实现）-PCM (pulse code modulation, including legal and U A legal functions of the compression achieved)
Update : 2024-05-05 Size : 3072 Publisher : 谢文武
【matlab】 Pulse_shaping_LUT DL : 0: 通信仿真：利用Matlab实现的脉冲成型仿真-Communication Simulation : Matlab Pulse Forming Simulation
Update : 2024-05-05 Size : 406528 Publisher : 胡玉贵
【matlab】 CP0201 DL : 0: TH-UWB信号的产生，有随即信号发生器，脉冲位置调制等部分组成。-TH-UWB signals generated, then signal generator, pulse position modulation, and other components.
Update : 2024-05-05 Size : 4096 Publisher : 李哲
【Special Effects】 pcnnlvbo DL : 1: 一个基于脉冲耦合神经网络的高斯噪声滤波程序，包括源码和实验结果-pulse coupling based on a neural network Gaussian noise filtering procedures, including source and experimental results
Update : 2024-05-05 Size : 147456 Publisher : huangsong
【Algorithm】 FDTD_PULSE DL : 0: fdtd计算二维电磁脉冲的源程序。脉冲为高斯调制脉冲，很有帮助的-fdtd calculation of the two-dimensional electromagnetic pulse source. Gaussian pulse to pulse modulation, helpful
Update : 2024-05-05 Size : 5120 Publisher : 陈永耀
【matlab】 TLsvpwm4 DL : 0: MATLAB的SVPWM仿真,最原始的脉宽调制方法,方便使用TI公司DSP同志使用,高手可选.-SVPWM MATLAB simulation, the most primitive pulse width modulation method, ease of use TI's DSP use, master optional.
Update : 2024-05-05 Size : 7168 Publisher : 小吴
【File Format】 pcm DL : 0: 脉冲编码调制实验过程（PCM）本文详细介绍了PCM编码的实验过程-Pulse code modulation experiment (PCM) This paper introduces in detail the experimental process of PCM coding
Update : 2024-05-05 Size : 262144 Publisher : gaopengfei
【SCM】 upload DL : 0: 单片机脉搏测量仪的电路设计和源码，包括KEIL调试文件和PROTEUS仿真文件-Single-chip pulse measuring instrument circuit design and source code, including KEIL debug files and documents PROTEUS simulation
Update : 2024-05-05 Size : 229376 Publisher : tnaglke
【Documents】 ldxhcl DL : 0: 雷达信号处理,针对现代雷达信号处理的主要方式，运用数字信号处理理论和 Matlab 软件研究雷达信号处理的仿真问题。提出了一个仿真模型，该模型可以仿真雷达信号、热噪声与杂波的产生和雷达系统中信号的动态处理过程。用 Matlab 对某脉冲压缩雷达信号处理系统进行了仿真，得到了雷达系统中各个处理点上的具体信号形式，既包含幅度信息，又包含相位信息，该模型能较好地满足对雷达信号处理的仿真要求，显示了用 Matlab 仿真雷达信号处理系统的方便、快捷的优点。 -Radar signal processing, radar signal processing for the modern major mode of use of digital signal processing theory and Matlab software simulation of the radar signal processing problems. Proposed a simulation model, the model can be simulation of radar signals, thermal noise and clutter of the radar system in the generation and dynamic signal processing. Using Matlab for a pulse compression radar signal processing system simulation, radar systems have been various points on the treatment of specific signal form contains both amplitude information, but also contains the phase information, the model can better meet the needs of radar signal processing simulation requirements, shows the Matlab simulation using radar signal processing system convenient, fast advantages.
Update : 2024-05-05 Size : 157696 Publisher : wp
【Modem program】 kdtele3 DL : 0: Make and answer phone calls Detect tone and pulse digit from the phone line Capture Caller ID Support blind transfer, single-step transfer/conference, consultation transfer/conference, hold, unhold. Control of the local phone handset, microphone and speaker of the modem Send and receive faxes Play and record on the phone line or sound card Play music in background mode Silence detection VU Meter Wave sound editor that allows your end-users to edit their own sound files. Voice recognition and voice synthesis. Full control over the serial port device ZModem file transfer utility File compression and encryption utility
Update : 2024-05-05 Size : 7383040 Publisher : 吴柳
【VHDL-FPGA-Verilog】 PULSE DL : 0: 由VHDL 语言实现的数控分频利用的是QUARTUES环境已经得到验证-By the NC VHDL language is the use of sub-frequency QUARTUES environment has been tested
Update : 2024-05-05 Size : 172032 Publisher : df
【Special Effects】 pcnn DL : 0: 利用pcnn脉冲耦合神经网络进行图象滤波,利用pcnn定位图象噪声,根据定位情况进行滤波,输出-Using pulse coupled neural network PCNN for image filtering, image noise using PCNN positioning, according to location to conduct filtering, output
Update : 2024-05-05 Size : 1024 Publisher : 叶开

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