based on Verilog-HDL hardware Circuit of 9.1 simple programmable pulse generator 9.1.1 system functions described by the temporal flow chart 9.1.2 9.1.3 System Design Description logic diagram 9.1.5 9.1.4 Delay Module detailed description and simulation of 9.1. 6 functional modules Verilog-HDL description of the modular input method detection module 9.1.7 detailed 9.1.8 Description and Simulation module counting a detailed description 9.1.9 programmable pulse generator system 9.1.10 Simulation programmable pulse generator hardware on the circuit design 9.1.11 Constant Some of the terminology

09-01_fangzhen
..............\ONE_PULSE.v
..............\ONE_PULSE_TEST.v
..............\P_DETECT.v
..............\P_DETECT_TEST.v
..............\P_DLY_1.v
..............\P_DLY_1_TEST.v
..............\P_DLY_2.v
..............\P_DLY_2_TEST.v

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