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【Mathimatics-Numerical algorithms】多抽样率频率抽样FIR 数字滤波器设计.rar DL : 0: 多抽样率频率抽样FIR 数字滤波器设计
Update : 2024-05-17 Size : 155175 Publisher :
【Mathimatics-Numerical algorithms】 19点FIR低通滤波C语言程序 DL : 0: 这是一个对语音信号(0.3kHz~3.4kHz)进行低通滤波的C语言程序，低通滤波的截止频率为800Hz，滤波器采用19点的有限冲击响应FIR滤波。语音信号的采样频率为8kHz，每个语音样值按16位整型数存放在insp.dat文件中。-This c program is a low pass filter for radio signal 0.3kHz-3.4kHz.The stop frequence of this filter is 800hz.This digtal filter chooses 19 points FIR.the fs is 8kHz.every datas is memoryed in filed-insp.dat.
Update : 2008-10-13 Size : 1269 Publisher : 郑涛
【Other resource】 dspC6000-FIR DL : 1: TI C6000 DSP的FIR滤波器代码-TI C6000 DSP s FIR filter code.
Update : 2008-10-13 Size : 16584 Publisher : 灵儿
【Other resource】 DSP FIR滤波器 DL : 0: FIR滤波器，只要为DSP课程设计提供源程序-FIR filter, as long as the courses for DSP design source
Update : 2008-10-13 Size : 5184 Publisher : 郭小珍
【Documents】 FIR DL : 0: 这是关于离散数字信号处理的FIR变换窗程序（凯塞窗汉明窗）(This is about discrete digital signal processing Fir Transform window program (Kaiser Window Hamming window))
Update : 2024-05-17 Size : 1024 Publisher : 似懂非懂多少分
【Other】 VHDL-FIR-filters DL : 0: ynthesizable FIR filters in VHDL with a focus on optimal mapping to Xilinx DSP slices. This repository contains a transposed direct form, systolic form for single-rate FIR filters and a custom parallel polyphase FIR decimating filter. The VHDL has been synthesized with Xilinx Vivado 2015.1 to confirm the correct DSP cascade chain is inferred.
Update : 2024-05-17 Size : 37888 Publisher : Abkoti
【VHDL-FPGA-Verilog】 FIR DL : 0: fir滤波器的简单实现，主要用于学习与理解(Simple implementation of the fir filter, mainly for learning and understanding)
Update : 2024-05-17 Size : 1024 Publisher : 未曾走远
【Documents】 Design a 24th order FIR highpass filter DL : 0: Design a 24th order FIR highpass filter using the frequency sampling method.
Update : 2024-05-17 Size : 9216 Publisher : firdaus
【Other】 fir lowpass DL : 0: FIR low pass filter for filter
Update : 2024-05-17 Size : 89088 Publisher : Steven Ting
【Other】 FIR DL : 0: 实现多带FIR滤波，可回复原始信号，主要针对噪声信号的处理。(The multi band FIR filter can be realized, and the original signal can be recovered, which mainly deals with the processing of the noise signal.)
Update : 2024-05-17 Size : 1024 Publisher : 梦晴
【SCM】 fir滤波器 DL : 0: 实现ccs软件fir低通滤波器仿真的c语言程序(C language program for CCS software FIR low pass filter simulation.)
Update : 2024-05-17 Size : 486400 Publisher : xfyv587
【matlab】基于matlab的FIR滤波器设计及DSP实现 DL : 0: FIR 滤波器设计代码，可以在DSP上实现。(The design code of FIR filter can be implemented on DSP.)
Update : 2024-05-17 Size : 1522688 Publisher : ousam
【VHDL-FPGA-Verilog】 FIR DL : 0: 采用加法树设计8位乘法器，具有流水线结构7阶FIR滤波器，输入序列信号字长4位表示，并且是无符号数。(An adder tree is used to design the 8 bit multiplier, which has a pipelined 7 order FIR filter. The input sequence signal is 4 bits, and it is an unsigned number.)
Update : 2024-05-17 Size : 1024 Publisher : mofeizq
【Communication-Mobile】 FIR DL : 0: 利用Kaiser窗函数，设计具有如下指标的FIR低通滤波器：fs=20KHz, fpass=4kHz, fstop= 5KHz, Apass=0.1dB, Astop=80dB。(The FIR low-pass filter designed by Kaiser window function is used for digital filtering.)
Update : 2024-05-17 Size : 325632 Publisher : 盖帅
【DSP program】 Matlab的FIR数字滤波器的设计与仿真 DL : 0: Matlab的FIR数字滤波器的设计与仿真(Design and Simulation of FIR digital filter for Matlab)
Update : 2024-05-17 Size : 1024 Publisher : 孙叡
【VHDL-FPGA-Verilog】 FIR设计实现sgh DL : 0: FIR滤波FPGA实现，已在仿真软件上验证实现，不是IP核，不是ip核。(FIR filter FPGA implementation, has been verified in the simulation software, not IP core, not IP core.)
Update : 2024-05-17 Size : 25600 Publisher : 韩冻少
【Other】 FIR DL : 0: 一个1MHz的FIR低通滤波器。 ① 时钟信号频率16MHz; ② 输入信号位宽8bits，符号速率16MHz；(A 1MHz FIR low pass filter. The frequency of a clock signal 16MHz; The width of the input signal 8bits, the symbol rate of 16MHz)
Update : 2024-05-17 Size : 10240 Publisher : stroller
【matlab】 FIR数字滤波器的设计与实现 DL : 0: FIR滤波器的相关知识以及生成所需要用到的matlab函数，具体生成例程。(FIR filter related knowledge and generate the matlab function needed to generate specific routines.)
Update : 2024-05-17 Size : 10553344 Publisher : byepf
【VHDL-FPGA-Verilog】 fir-filter-design-with-VHDL.doc DL : 0: 用VHDL设计一个18阶fir低通滤波器文档(VHDL design with a fir-order low-pass filter 18 documents)
Update : 2024-05-17 Size : 5120 Publisher : sherry wang
【Communication-Mobile】宽带FIR波束形成 DL : 1: 用自适应方法设计具有特定频率响应的FIR滤波器用于进行时域宽带波束形成(Adaptive design of FIR filter with specific frequency response for time domain broadband beamforming)
Update : 2024-05-17 Size : 39936 Publisher : cookun

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