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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 284kb
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  • Author :田辉
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Introduction - If you have any usage issues, please Google them yourself
spi the FPGA-driven development for embedded systems
Packet file list
(Preview for download)
spi
...\code
...\....\SPI_Master.v
...\modelsim
...\........\SPI_Master.cr.mti
...\........\SPI_Master.mpf
...\........\SPI_Master.v
...\........\SPI_Master_test.v
...\........\SPI_Master_test.v.bak
...\........\transcript
...\........\vsim.wlf

...\........\wave.do
...\........\work
...\........\....\@s@p@i_@master
...\........\....\..............\verilog.psm
...\........\....\..............\_primary.dat
...\........\....\..............\_primary.vhd
...\........\....\@s@p@i_master_test
...\........\....\..................\transcript
...\........\....\..................\verilog.psm
...\........\....\..................\_primary.dat
...\........\....\..................\_primary.vhd
...\........\....\_info
...\quartus
...\.......\cmp_state.ini
...\.......\db
...\.......\..\prev_cmp_SPI_Master.asm.qmsg
...\.......\..\prev_cmp_SPI_Master.fit.qmsg
...\.......\..\prev_cmp_SPI_Master.map.qmsg
...\.......\..\prev_cmp_SPI_Master.tan.qmsg
...\.......\..\SPI_Master.asm.qmsg
...\.......\..\SPI_Master.cbx.xml
...\.......\..\SPI_Master.cmp.cdb
...\.......\..\SPI_Master.cmp.ddb
...\.......\..\SPI_Master.cmp.hdb
...\.......\..\SPI_Master.cmp.logdb
...\.......\..\SPI_Master.cmp.rdb
...\.......\..\SPI_Master.cmp.tdb
...\.......\..\SPI_Master.csf.qmsg
...\.......\..\SPI_Master.dbp
...\.......\..\SPI_Master.db_info
...\.......\..\SPI_Master.fit.qmsg
...\.......\..\SPI_Master.hier_info
...\.......\..\SPI_Master.hif
...\.......\..\SPI_Master.icc
...\.......\..\SPI_Master.map.cdb
...\.......\..\SPI_Master.map.hdb
...\.......\..\SPI_Master.map.logdb
...\.......\..\SPI_Master.map.qmsg
...\.......\..\SPI_Master.pre_map.hdb
...\.......\..\SPI_Master.project.hdb
...\.......\..\SPI_Master.psp
...\.......\..\SPI_Master.pss
...\.......\..\SPI_Master.rtlv.hdb
...\.......\..\SPI_Master.rtlv_sg.cdb
...\.......\..\SPI_Master.rtlv_sg_swap.cdb
...\.......\..\SPI_Master.sgdiff.cdb
...\.......\..\SPI_Master.sgdiff.hdb
...\.......\..\SPI_Master.SPI_Master.sld_design_entry.sci
...\.......\..\SPI_Master.syn_hier_info
...\.......\..\SPI_Master.tan.qmsg
...\.......\..\SPI_Master_cmp.qrpt
...\.......\..\SPI_Master_hier_info
...\.......\..\SPI_Master_syn_hier_info
...\.......\SPI_Master.asm.rpt
...\.......\SPI_Master.bsf
...\.......\SPI_Master.done
...\.......\SPI_Master.dpf
...\.......\SPI_Master.fit.eqn
...\.......\SPI_Master.fit.rpt
...\.......\SPI_Master.fit.smsg
...\.......\SPI_Master.fit.summary
...\.......\SPI_Master.flow.rpt
...\.......\SPI_Master.map.eqn
...\.......\SPI_Master.map.rpt
...\.......\SPI_Master.map.smsg
...\.......\SPI_Master.map.summary
...\.......\SPI_Master.pin
...\.......\SPI_Master.pof
...\.......\SPI_Master.qpf
...\.......\SPI_Master.qsf
...\.......\SPI_Master.qws
...\.......\SPI_Master.tan.rpt
...\.......\SPI_Master.tan.summary
...\.......\SPI_Master.v
...\.......\SPI_Master_assignment_defaults.qdf
...\.......\SPI_master_test.bsf
...\.......\test.bdf
...\testbench
...\.........\SPI_Master_test.v
...\.........\transcript
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