I have written a Verilog clock procedures, in Xilinx s ISE simulation through

clock
.....\clock.ise
.....\clock.ise_ISE_Backup
.....\clock.v
.....\clock2_test.ant
.....\clock2_test.jhd
.....\clock2_test.tbw
.....\clock2_test.tfw
.....\clock2_test.v
.....\clock2_test.xwv
.....\clock2_test.xwv_bak
.....\clock2_test_beh.prj
.....\clock2_test_bencher.prj
.....\clock2_test_isim_beh.exe
.....\clock2_test_v_stx.prj
.....\clock_stx.prj
.....\clock_summary.html
.....\clock_test.ant
.....\clock_test.jhd
.....\clock_test.tbw
.....\clock_test.tfw
.....\clock_test.xwv
.....\clock_test.xwv_bak
.....\clock_test_beh.prj
.....\clock_test_bencher.prj
.....\clock_test_isim_beh.exe
.....\isim
.....\....\temp
.....\....\....\hdllib.ref
.....\....\....\hdpdeps.ref
.....\....\....\vlg20
.....\....\....\.....\clock.bin
.....\....\....\vlg26
.....\....\....\.....\clock2__test__v.bin
.....\....\....\vlg2D
.....\....\....\.....\glbl.bin
.....\....\work
.....\....\....\clock
.....\....\....\.....\clock.h
.....\....\....\.....\mingw
.....\....\....\.....\.....\clock.obj
.....\....\....\clock2__test
.....\....\....\............\clock2__test.h
.....\....\....\............\mingw
.....\....\....\............\.....\clock2__test.obj
.....\....\....\............\xsimclock2__test.cpp
.....\....\....\clock__test
.....\....\....\...........\clock__test.h
.....\....\....\...........\mingw
.....\....\....\...........\.....\clock__test.obj
.....\....\....\...........\xsimclock__test.cpp
.....\....\....\glbl
.....\....\....\....\glbl.h
.....\....\....\....\mingw
.....\....\....\....\.....\glbl.obj
.....\....\....\hdllib.ref
.....\....\....\hdpdeps.ref
.....\....\....\vlg1D
.....\....\....\.....\clock2__test.bin
.....\....\....\vlg20
.....\....\....\.....\clock.bin
.....\....\....\vlg2D
.....\....\....\.....\glbl.bin
.....\....\....\vlg43
.....\....\....\.....\clock__test.bin
.....\isim.cmd
.....\isim.hdlsourcefiles
.....\isim.log
.....\isim.tmp_save
.....\.............\_1
.....\isimwavedata.xwv
.....\tmpRTVStore.xwv
.....\xilinxsim.ini
.....\_xmsgs
.....\......\fuse.xmsgs
.....\__ISE_repository_clock.ise_.lock

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