FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.

ref-sdr-sdram-vhdl
..................\cmp_state.ini
..................\CVS
..................\db
..................\..\sdr_sdram.db_info
..................\..\sdr_sdram.eco.cdb
..................\..\sdr_sdram.sld_design_entry.sci
..................\doc
..................\...\CVS
..................\license.txt
..................\readme_sdr_sdram.txt
..................\sdr_sdram.acf
..................\sdr_sdram.hif
..................\sdr_sdram.pdf
..................\sdr_sdram.qpf
..................\sdr_sdram.qsf
..................\sdr_sdram.qws
..................\simulation
..................\..........\CVS
..................\..........\sdr_sdram_tb.vhd
..................\source
..................\......\cmp_state.ini
..................\......\Command.vhd
..................\......\control_interface.vhd
..................\......\CVS
..................\......\db
..................\......\..\sdr_sdram.db_info
..................\......\..\sdr_sdram.eco.cdb
..................\......\..\sdr_sdram.sld_design_entry.sci
..................\......\pll1.vhd
..................\......\sdr_data_path.vhd
..................\......\sdr_sdram.qpf
..................\......\sdr_sdram.qsf
..................\......\sdr_sdram.qws
..................\......\sdr_sdram.vhd

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