3 on the Viterbi FPGA optimization codecs design documents: 1, Viterbi decoder FPGA Design Implementation and Optimization. Pdf2, Viterbi decoder, low-power design. Pdf3, high-speed FPGA-based parallel Viterbi decoder Design and Implementation. pdf

Viterbi译码器的FPGA设计实现与优化.pdf
Viterbi译码器的低功耗设计.pdf
基于FPGA的高速并行Viterbi译码器的设计与实现.pdf

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