TLV1544 with TMS320VC5402 through serial port connectivity, at this time, A/D conversion chip as from the equipment, to provide frame synchronization DSP and input/output clock signal. TLV1544 DSP and data exchange between the chronology of the map is shown in figure 3. At the beginning of the margin (in chip-activated), and I DATA IN/OCLK invalid, DATAOUT at high resistance state. When the serial interface CS change low (activator), the chip start work, I/OCLK and DATAIN can DATA OUT is no longer in a state of high resistance. DSP through I/OCLK pin provide input/output clock 8 sequence, When the DSP from the frame synchronization pulse, the chip from the DATA IN receive four channels to choose b address, DATAOUT sent from the same time the previous conversion results from the

tlv1544.txt

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