=== === = clock 20 : 6 === === === == should first register initialization state tx1714 EQU 7FFH EQU PA PB EQU 05H 06H 07H PC EQU PD EQU 20H IAR E QU 00H indirectly addressable registers TMR0 EQU 01H timer STATUS EQU Mr send state BSR EQU-deposit bank in the 04H choice Register PORTA EQU 05H I/O ports Register P ORTB EQU 06H I/O ports Register PORTC EQU 07H I/O ports Register POR TD EQU 20H I/O ports Register PULL EQU 21H PULL-High pull Register WAKEUP EQU 22H awaken control registers-- were used to set watchdog allowed and prohibited I RQM EQU 23H interrupt masking register IRQF EQU 24H interrupted signs Register WDTSEL E QU 25H

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