Digital Communication System Communication System modulation and demodulation (PL_FSK) VHDL modeling, including sending and receiving modules

PL_FSK
......\db
......\..\PL_FSK.asm.qmsg
......\..\PL_FSK.cbx.xml
......\..\PL_FSK.cmp.cdb
......\..\PL_FSK.cmp.hdb
......\..\PL_FSK.cmp.logdb
......\..\PL_FSK.cmp.rdb
......\..\PL_FSK.cmp.tdb
......\..\PL_FSK.cmp0.ddb
......\..\PL_FSK.dbp
......\..\PL_FSK.db_info
......\..\PL_FSK.eco.cdb
......\..\PL_FSK.eds_overflow
......\..\PL_FSK.fit.qmsg
......\..\PL_FSK.hier_info
......\..\PL_FSK.hif
......\..\PL_FSK.map.cdb
......\..\PL_FSK.map.hdb
......\..\PL_FSK.map.logdb
......\..\PL_FSK.map.qmsg
......\..\PL_FSK.pre_map.cdb
......\..\PL_FSK.pre_map.hdb
......\..\PL_FSK.psp
......\..\PL_FSK.rtlv.hdb
......\..\PL_FSK.rtlv_sg.cdb
......\..\PL_FSK.rtlv_sg_swap.cdb
......\..\PL_FSK.sgdiff.cdb
......\..\PL_FSK.sgdiff.hdb
......\..\PL_FSK.signalprobe.cdb
......\..\PL_FSK.sim.hdb
......\..\PL_FSK.sim.qmsg
......\..\PL_FSK.sim.rdb
......\..\PL_FSK.sld_design_entry.sci
......\..\PL_FSK.sld_design_entry_dsc.sci
......\..\PL_FSK.syn_hier_info
......\..\PL_FSK.tan.qmsg
......\PL_FSK.asm.rpt
......\PL_FSK.bdf
......\PL_FSK.done
......\PL_FSK.fit.eqn
......\PL_FSK.fit.rpt
......\PL_FSK.fit.summary
......\PL_FSK.flow.rpt
......\PL_FSK.map.eqn
......\PL_FSK.map.rpt
......\PL_FSK.map.summary
......\PL_FSK.pin
......\PL_FSK.qpf
......\PL_FSK.qsf
......\PL_FSK.qws
......\PL_FSK.sim.rpt
......\PL_FSK.tan.rpt
......\PL_FSK.tan.summary
......\PL_FSK.vwf
......\PL_FSK1.bsf
......\PL_FSK1.vhd
......\PL_FSK2.bsf
......\PL_FSK2.vhd
......\talkback
......\........\PL_FSK.asm.talkback.xml
......\........\PL_FSK.fit.talkback.xml
......\........\PL_FSK.map.talkback.xml
......\........\PL_FSK.sim.talkback.xml
......\........\PL_FSK.tan.talkback.xml

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