Altera FPGA IP core of the source code for the use of Altera FPGA design to provide the relevant information.

CORNER.INC
CORNER.SYM
CORNER.TDF
COS180N.MIF
COS180P.MIF
COSINE.INC
COSINE.SYM
COSINE.TDF
CUART.GDF
CUART.INC
CUART.SYM
DIV_BY_N.INC
DIV_BY_N.SYM
DIV_BY_N.TDF
DYNRAM.INC
DYNRAM.SYM
DYNRAM.TDF
GRAY.INC
GRAY.SYM
GRAY.TDF
I2C.INC
I2C.SYM
I2C.TDF
I2C_TEST.GDF
I2C_TEST.INC
I2C_TEST.SYM
LFSR.INC
LFSR.SYM
LFSR.TDF
MII.INC
MII.SYM
MII.TDF
MOT_MUX.INC
MOT_MUX.SYM
MOT_MUX.TDF
NCO.INC
NCO.SYM
NCO.TDF
SINE.INC
SINE.SYM
SINE.TDF
UART_RX.INC
UART_RX.SYM
UART_RX.TDF
UART_TX.INC
UART_TX.SYM
UART_TX.TDF
VAR_DIV.INC
VAR_DIV.SYM
VAR_DIV.TDF
VGA_SYNC.INC
VGA_SYNC.SYM
VGA_SYNC.TDF

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