MC8051 IP CoreOregano Systems 8-bit Microcontroller IP-Core company for the 8051 core very easy to use in FPGA VHDL is also studying a good example of the SSP

mc8051
......\c
......\.\hex2dual.c
......\.\hex2dual.dev
......\.\hex2dual.exe
......\.\hex2dual.o
......\.\Makefile.win
......\.\mc8051_rom.dua
......\.\TC1INT.hex
......\.\TC1SER.hex
......\.\tc1tim.hex
......\.\TC2INT.hex
......\.\TC2TIM.hex
......\.\tc3int.hex
......\.\tc3tim.hex
......\.\TC4INT.hex
......\doc
......\...\8051_overview.pdf
......\...\comp_orig_ipcore.pdf
......\...\mc8051_overview.pdf
......\...\mc8051_user_guide.pdf
......\impl
......\....\cyclone
......\....\.......\db
......\....\stratixii
......\....\.........\db
......\....\virtex2p
......\....\virtex4
......\msim
......\....\hex2dual.c
......\....\keil.dua
......\....\keil.hex
......\....\mc8051_compile.do
......\....\mc8051_rom.dua
......\....\mc8051_sim.do
......\....\mc8051_simint.do
......\....\mc8051_simtim.do
......\....\mc8051_tb.do
......\....\mc8051_wave.do
......\....\mc8051_waveint.do
......\....\mc8051_wavetim.do
......\....\readme.txt
......\....\regs.log
......\....\stored_waves
......\....\tc1.asm
......\....\tc1.dua
......\....\tc1.hex
......\....\write2file.do
......\syn
......\...\dc
......\...\..\.synopsys_dc.setup
......\...\..\command.log
......\...\..\db
......\...\..\lib
......\...\..\log
......\...\..\reports
......\...\..\scr
......\...\..\...\synth_core_dc.scr
......\...\..\synthesize_mc8051_core
......\...\leo
......\...\...\apexe
......\...\...\.....\full
......\...\...\.....\....\2001.1b
......\...\...\.....\....\2001.1d
......\...\...\.....\minimum
......\...\...\.....\.......\2001.1b
......\...\...\.....\.......\2001.1d
......\...\...\virtexe
......\...\...\.......\full
......\...\...\.......\....\2001.1b
......\...\...\.......\....\2001.1d
......\...\...\.......\minimum
......\...\...\.......\.......\2001.1b
......\...\...\.......\.......\2001.1d
......\...\precision
......\...\.........\mc8051.psp
......\...\.........\mc8051.sdc
......\...\.........\mc8051_core_impl_1
......\...\.........\..................\fsm_work
......\...\.........\mc8051_core_struc_impl_4
......\...\.........\........................\fsm_work
......\...\.........\synthesize.tcl
......\...\synp
......\...\....\cyclone
......\...\....\.......\lec
......\...\....\.......\syntmp
......\...\....\.......\verif
......\...\....\mc8051_core.prd
......\...\....\mc8051_core.prj
......\...\....\stratixii
......\...\....\.........\lec
......\...\....\.........\syntmp
......\...\....\.........\verif
......\...\....\virtex2p
......\...\....\........\lec
......\...\....\........\syntmp
......\...\....\........\verif
......\...\....\virtex4
......\...\....\.......\lec
......\...\....\.......\syntmp

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