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频率计实验程序代码

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2019-12-24
  • Size : 23kb
  • Downloaded :0次
  • Author :wanzaiwharf
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Introduction - If you have any usage issues, please Google them yourself
Verilog frequency meter program of xc7a35tcsg324-1 supports decadal frequency division and switching internal and external signal input
Packet file list
(Preview for download)
FilenameSizeUpdate
实验程序代码 0 2019-11-30
实验程序代码\EGO1_FSMSEQDET.xdc 2137 2019-11-29
实验程序代码\binbcd14.v 907 2019-11-29
实验程序代码\clkdiv.v 1156 2019-11-29
实验程序代码\hz_counter.v 1044 2019-11-29
实验程序代码\hz_counter_top.bit 2192122 2019-11-30
实验程序代码\hz_counter_top.v 1668 2019-11-29
实验程序代码\sig_10div.v 1005 2019-11-30
实验程序代码\sig_select.v 731 2019-11-29
实验程序代码\signalinput.v 1528 2019-11-29
实验程序代码\x7segbc.v 1938 2019-11-29
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