A remote control system is designed based on the experimental board of FPGA, which receives the data sent by the computer and completes the corresponding calculation with the data input by the matrix keyboard on the experimental board. The results are displayed on the digital tube of the experimental board and sent back to the computer for display at the same time.

Filename	Size	Update
project2\aitai\aitai.bsf	7231	2018-09-12
project2\aitai\aitai.qpf	1280	2018-09-09
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project2\aitai\db\aitai.lpc.txt	1060	2018-09-12
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project2\aitai\db\aitai.sgdiff.cdb	14555	2018-09-12
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project2\aitai\db\aitai.vpr.ammdb	351	2018-09-10
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project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.cmp.logdb	4	2018-09-10
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.cmp.rcfdb	13126	2018-09-10
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.cdb	14305	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.dpi	879	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.hbdb.cdb	1289	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.hbdb.hb_info	46	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.hbdb.hdb	16117	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.hbdb.sig	32	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.hdb	15862	2018-09-12
project2\aitai\incremental_db\compiled_partitions\aitai.root_partition.map.kpt	3331	2018-09-12
project2\aitai\incremental_db\README	653	2018-09-09
project2\aitai\output_files\aitai.asm.rpt	7939	2018-09-10
project2\aitai\output_files\aitai.done	26	2018-09-12
project2\aitai\output_files\aitai.eda.rpt	5584	2018-09-10
project2\aitai\output_files\aitai.fit.rpt	133241	2018-09-10
project2\aitai\output_files\aitai.fit.smsg	703	2018-09-10
project2\aitai\output_files\aitai.fit.summary	600	2018-09-10
project2\aitai\output_files\aitai.flow.rpt	8479	2018-09-12
project2\aitai\output_files\aitai.jdi	223	2018-09-10
project2\aitai\output_files\aitai.map.rpt	26954	2018-09-12
project2\aitai\output_files\aitai.map.smsg	127	2018-09-12
project2\aitai\output_files\aitai.map.summary	467	2018-09-12
project2\aitai\output_files\aitai.pin	27097	2018-09-10
project2\aitai\output_files\aitai.pof	524494	2018-09-10
project2\aitai\output_files\aitai.sof	151376	2018-09-10
project2\aitai\output_files\aitai.sta.rpt	117824	2018-09-10
project2\aitai\output_files\aitai.sta.summary	647	2018-09-10
project2\aitai\simulation\modelsim\aitai.sft	43	2018-09-10
project2\aitai\simulation\modelsim\aitai.vo	148306	2018-09-10
project2\aitai\simulation\modelsim\aitai.vt	3135	2018-09-10
project2\aitai\simulation\modelsim\aitai_modelsim.xrf	12031	2018-09-10
project2\aitai\simulation\modelsim\aitai_run_msim_gate_verilog.do	410	2018-09-10
project2\aitai\simulation\modelsim\aitai_run_msim_gate_verilog.do.bak	410	2018-09-10
project2\aitai\simulation\modelsim\aitai_run_msim_gate_verilog.do.bak1	410	2018-09-10
project2\aitai\simulation\modelsim\aitai_run_msim_gate_verilog.do.bak10	410	2018-09-10
project2\aitai\simulation\modelsim\aitai_run_msim_gate_verilog.do.bak2	410	2018-09-10

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