7segment ctrl testbench and velilog

seg_bcd.v
seg_bcd.v.bak
seg_crt.cr.mti
seg_crt.mpf
seg_crt.v.bak
seg_ctrl.v
seg_ctrl.v.bak
work
work\@b@c@d_to_7segment
work\@b@c@d_to_7segment\_primary.dat
work\@b@c@d_to_7segment\_primary.dbs
work\@b@c@d_to_7segment\_primary.vhd
work\@b@c@d_to_7segment\verilog.prw
work\@b@c@d_to_7segment\verilog.psm
work\@l@a@b05
work\@l@a@b05\_primary.dat
work\@l@a@b05\_primary.dbs
work\@l@a@b05\_primary.vhd
work\@l@a@b05\verilog.prw
work\@l@a@b05\verilog.psm
work\@seven@seg_@c@t@r@l
work\@seven@seg_@c@t@r@l\_primary.dat
work\@seven@seg_@c@t@r@l\_primary.dbs
work\@seven@seg_@c@t@r@l\_primary.vhd
work\@seven@seg_@c@t@r@l\verilog.prw
work\@seven@seg_@c@t@r@l\verilog.psm
work\_info
work\_temp
work\_vmake
work\binary_to_@b@c@d
work\binary_to_@b@c@d\_primary.dat
work\binary_to_@b@c@d\_primary.dbs
work\binary_to_@b@c@d\_primary.vhd
work\binary_to_@b@c@d\verilog.prw
work\binary_to_@b@c@d\verilog.psm
work\linedecoder
work\linedecoder\_primary.dat
work\linedecoder\_primary.dbs
work\linedecoder\_primary.vhd
work\linedecoder\verilog.prw
work\linedecoder\verilog.psm

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