Program used to configure the AD9883 chip register, using the IIC protocol.

iic\aaa.cr.mti
iic\aaa.mpf
iic\asd.cr.mti
iic\asd.mpf
iic\clk_rst.v
iic\db\i2c_master_top.cbx.xml
iic\db\i2c_master_top.cmp.bpm
iic\db\i2c_master_top.cmp.cdb
iic\db\i2c_master_top.cmp.ecobp
iic\db\i2c_master_top.cmp.hdb
iic\db\i2c_master_top.cmp.kpt
iic\db\i2c_master_top.cmp.logdb
iic\db\i2c_master_top.cmp.rdb
iic\db\i2c_master_top.cmp0.ddb
iic\db\i2c_master_top.cmp2.ddb
iic\db\i2c_master_top.cmp_merge.kpt
iic\db\i2c_master_top.db_info
iic\db\i2c_master_top.eco.cdb
iic\db\i2c_master_top.fit.qmsg
iic\db\i2c_master_top.hier_info
iic\db\i2c_master_top.hif
iic\db\i2c_master_top.lpc.html
iic\db\i2c_master_top.lpc.rdb
iic\db\i2c_master_top.lpc.txt
iic\db\i2c_master_top.map.bpm
iic\db\i2c_master_top.map.cdb
iic\db\i2c_master_top.map.ecobp
iic\db\i2c_master_top.map.hdb
iic\db\i2c_master_top.map.kpt
iic\db\i2c_master_top.map.logdb
iic\db\i2c_master_top.map.qmsg
iic\db\i2c_master_top.map_bb.cdb
iic\db\i2c_master_top.map_bb.hdb
iic\db\i2c_master_top.map_bb.logdb
iic\db\i2c_master_top.pre_map.cdb
iic\db\i2c_master_top.pre_map.hdb
iic\db\i2c_master_top.rpp.qmsg
iic\db\i2c_master_top.rtlv.hdb
iic\db\i2c_master_top.rtlv_sg.cdb
iic\db\i2c_master_top.rtlv_sg_swap.cdb
iic\db\i2c_master_top.sgate.rvd
iic\db\i2c_master_top.sgate_sm.rvd
iic\db\i2c_master_top.sgdiff.cdb
iic\db\i2c_master_top.sgdiff.hdb
iic\db\i2c_master_top.sld_design_entry.sci
iic\db\i2c_master_top.sld_design_entry_dsc.sci
iic\db\i2c_master_top.smart_action.txt
iic\db\i2c_master_top.smp_dump.txt
iic\db\i2c_master_top.syn_hier_info
iic\db\i2c_master_top.tis_db_list.ddb
iic\db\logic_util_heursitic.dat
iic\db\prev_cmp_i2c_master_top.fit.qmsg
iic\db\prev_cmp_i2c_master_top.map.qmsg
iic\i2c_master_bit_ctrl.v
iic\i2c_master_bit_ctrl.v.bak
iic\i2c_master_byte_ctrl.v
iic\i2c_master_byte_ctrl.v.bak
iic\i2c_master_defines.v
iic\i2c_master_top.done
iic\i2c_master_top.fit.rpt
iic\i2c_master_top.fit.smsg
iic\i2c_master_top.fit.summary
iic\i2c_master_top.flow.rpt
iic\i2c_master_top.map.rpt
iic\i2c_master_top.map.summary
iic\i2c_master_top.pin
iic\i2c_master_top.qpf
iic\i2c_master_top.qsf
iic\i2c_master_top.v
iic\i2c_master_top.v.bak
iic\i2c_slave_model.v
iic\i2c_slave_model.v.bak
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.cdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.dfp
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.hdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.kpt
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.logdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.rcfdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.cmp.re.rcfdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.map.cdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.map.dpi
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.map.hdb
iic\incremental_db\compiled_partitions\i2c_master_top.root_partition.map.kpt
iic\incremental_db\README
iic\tcl_stacktrace.txt
iic\timescale.v
iic\tst_bench_top.v
iic\tst_bench_top.v.bak
iic\vsim.wlf
iic\wb_master_model.v
iic\wlftm03ms7
iic\work\clk_rst\_primary.dat
iic\work\clk_rst\_primary.vhd
iic\work\i2c_master_bit_ctrl\verilog.asm
iic\work\i2c_master_bit_ctrl\_primary.dat
iic\work\i2c_master_bit_ctrl\_primary.vhd
iic\work\i2c_master_byte_ctrl\verilog.asm
iic\work\i2c_master_byte_ctrl\_primary.dat
iic\work\i2c_master_byte_ctrl\_primary.vhd
iic\work\i2c_master_top\verilog.asm

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