Verilog realize the jtag TAP, carried opencore.com, has passed validation

Packet : 33753146jtag.rar filelist
jtag\cell\rtl\BiDirectionalCell.v
jtag\cell\rtl\ControlCell.v
jtag\cell\rtl\InputCell.v
jtag\cell\rtl\OutputCell.v
jtag\doc\Boundary-Scan_Architecture.pdf
jtag\doc\or1k_10.bsd
jtag\ieee  tap\attic\BiDirectionalCell.v
jtag\ieee  tap\attic\Boundary-Scan_Architecture.pdf
jtag\ieee  tap\attic\ControlCell.v
jtag\ieee  tap\attic\InputCell.v
jtag\ieee  tap\attic\or1k_10.bsd
jtag\ieee  tap\attic\OutputCell.v
jtag\ieee  tap\attic\TAP.v
jtag\tap\doc\jtag.pdf
jtag\tap\doc\src\jtag.doc
jtag\tap\rtl\tap_defines.v
jtag\tap\rtl\tap_top.v
jtag\基于边界扫描技术的数字系统测试研究.mht
jtag\边界扫描器件BSDL描述在测试中的应用 中国治具论坛 治具治具论坛 益佳电子主办 中国治具论坛 - powered by phpwind_net.mht
jtag\tap\doc\src
jtag\cell\rtl
jtag\ieee  tap\attic
jtag\tap\doc
jtag\tap\rtl
jtag\cell
jtag\doc
jtag\ieee  tap
jtag\tap
jtag

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