| Filename | Size | Update |
|---|
| 一个基于FPGA的PCI数据采集程序 | 包括SDRAM控制 | PCI9054时序控制 | 开发语言verilog | 开发环境quartus (1)\FPGA_SDRAM_PCI\cmp_state.ini |
| ...............................................................................................\..............\command.v |
| ...............................................................................................\..............\control_interface.v |
| ...............................................................................................\..............\datacnt.v |
| ...............................................................................................\..............\.b\add_sub_ovb.tdf |
| ...............................................................................................\..............\..\altsyncram_k2j1.tdf |
| ...............................................................................................\..............\..\altsyncram_prf1.tdf |
| ...............................................................................................\..............\..\altsyncram_tji2.tdf |
| ...............................................................................................\..............\..\alt_synch_pipe_0e8.tdf |
| ...............................................................................................\..............\..\alt_synch_pipe_1e8.tdf |
| ...............................................................................................\..............\..\a_fefifo_30d.tdf |
| ...............................................................................................\..............\..\a_fefifo_80d.tdf |
| ...............................................................................................\..............\..\a_gray2bin_26b.tdf |
| ...............................................................................................\..............\..\a_graycounter_626.tdf |
| ...............................................................................................\..............\..\cmpr_5mh.tdf |
| ...............................................................................................\..............\..\cntr_5hi.tdf |
| ...............................................................................................\..............\..\cntr_68j.tdf |
| ...............................................................................................\..............\..\cntr_h5i.tdf |
| ...............................................................................................\..............\..\cntr_ifh.tdf |
| ...............................................................................................\..............\..\cntr_kua.tdf |
| ...............................................................................................\..............\..\cntr_rbk.tdf |
| ...............................................................................................\..............\..\dcfifo_egg1.tdf |
| ...............................................................................................\..............\..\decode_7ia.tdf |
| ...............................................................................................\..............\..\decode_ogi.tdf |
| ...............................................................................................\..............\..\dffpipe_oe9.tdf |
| ...............................................................................................\..............\..\dffpipe_qe9.tdf |
| ...............................................................................................\..............\..\dffpipe_re9.tdf |
| ...............................................................................................\..............\..\dpram_45v.tdf |
| ...............................................................................................\..............\..\mux_4eb.tdf |
| ...............................................................................................\..............\..\WITH_SDRAM_DAQ.asm.qmsg |
| ...............................................................................................\..............\..\WITH_SDRAM_DAQ.cbx.xml |
| ............................................................. |