gate: the realization of basic logic gates and verification mux4_1_gate: multiplexer gate-level implementation and verification mux4_1_behav: Multiplexer behavioral implementation and verification seg7_gate: 7-segment digital tube logic gate implementation and verification seg7_behav: 7 segment digital tube case statements describe and validate mux7seg: using buttons multiplex seven segment LED implementation and verification clkseg7: clock automatically scans using 7-segment digital tube multiplex implementation and verification comp4_gate: 4-bit comparator structured implementation and verification comp8_behav: 8-bit comparator behavior implementation and verification decode3_8_gate :3-8 decoder logic gate implementation and verification decode3_8_behav :3-8 decoder implementation and verification of case statement encode8_3_gate :8-3 encoder gate-level implementation and verification encode8_3_behav :8-3 encoder implementation and verification of logic gates priority_encoder8_3: 8-3

VHDL_book1
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