BCD binary switch program written in Verilog hdl

db\add_sub_5ph.tdf
..\bcd.asm.qmsg
..\bcd.asm_labs.ddb
..\bcd.cbx.xml
..\bcd.cmp.cdb
..\bcd.cmp.hdb
..\bcd.cmp.kpt
..\bcd.cmp.logdb
..\bcd.cmp.rdb
..\bcd.cmp.tdb
..\bcd.cmp0.ddb
..\bcd.dbp
..\bcd.db_info
..\bcd.eco.cdb
..\bcd.fit.qmsg
..\bcd.hier_info
..\bcd.hif
..\bcd.map.cdb
..\bcd.map.hdb
..\bcd.map.logdb
..\bcd.map.qmsg
..\bcd.pre_map.cdb
..\bcd.pre_map.hdb
..\bcd.psp
..\bcd.rtlv.hdb
..\bcd.rtlv_sg.cdb
..\bcd.rtlv_sg_swap.cdb
..\bcd.sgdiff.cdb
..\bcd.sgdiff.hdb
..\bcd.signalprobe.cdb
..\bcd.sld_design_entry.sci
..\bcd.sld_design_entry_dsc.sci
..\bcd.syn_hier_info
..\bcd.tan.qmsg
..\bcd_cmp.qrpt
bcd.asm.rpt
bcd.cdf
bcd.done
bcd.dpf
bcd.fit.eqn
bcd.fit.rpt
bcd.fit.smsg
bcd.fit.summary
bcd.flow.rpt
bcd.map.eqn
bcd.map.rpt
bcd.map.summary
bcd.pin
bcd.pof
bcd.qpf
bcd.qsf
bcd.qws
bcd.tan.rpt
bcd.tan.summary
bcd.v
bcd_assignment_defaults.qdf
cmp_state.ini
db

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