ISE7.1, using VIRTEX-II chip. Adc realize data sampling, on average, channel selection, the sampling clock select, adjust data formats, including fifo, uart modules.

Packet : 57578849vhdl0716.rar filelist
vhdl0716\ sin_data_bit.txt
vhdl0716\0716.dhp
vhdl0716\0716.ise
vhdl0716\0716.ise_ISE_Backup
vhdl0716\accumulator_ctr_dataadjust.vhd
vhdl0716\adc_control.vhd
vhdl0716\adc_test.cdc
vhdl0716\add_accumulator.vhd
vhdl0716\automake.log
vhdl0716\baud.vhd
vhdl0716\bitgen.ut
vhdl0716\ctr_wide_narrow.ant
vhdl0716\ctr_wide_narrow.fdo
vhdl0716\ctr_wide_narrow.jhd
vhdl0716\ctr_wide_narrow.tbw
vhdl0716\ctr_wide_narrow.udo
vhdl0716\ctr_wide_narrow.vhw
vhdl0716\ctr_wide_narrow.xwv
vhdl0716\ctr_wide_narrow.xwv_bak
vhdl0716\ctr_wide_narrow_bencher.prj
vhdl0716\dataformat_adjust_log.vhd
vhdl0716\dataformat_adjust_narrowfreq.vhd
vhdl0716\dataformat_adjust_widefreq.vhd
vhdl0716\fifo_rs232.edn
vhdl0716\fifo_rs232.ngo
vhdl0716\fifo_rs232.sym
vhdl0716\fifo_rs232.v
vhdl0716\fifo_rs232.veo
vhdl0716\fifo_rs232.vhd
vhdl0716\fifo_rs232.vho
vhdl0716\fifo_rs232.xco
vhdl0716\mux_log_wide_narrow.vhd
vhdl0716\narrow_wide_pulse_generate.cmd_log
vhdl0716\narrow_wide_pulse_generate.lso
vhdl0716\narrow_wide_pulse_generate.ngc
vhdl0716\narrow_wide_pulse_generate.ngr
vhdl0716\narrow_wide_pulse_generate.prj
vhdl0716\narrow_wide_pulse_generate.stx
vhdl0716\narrow_wide_pulse_generate.syr
vhdl0716\narrow_wide_pulse_generate.vhd
vhdl0716\narrow_wide_pulse_generate_summary.html
vhdl0716\pepExtractor.prj
vhdl0716\readfifo_rs232.vhd
vhdl0716\reciever.vhd
vhdl0716\results.txt
vhdl0716\select_clk.vhd
vhdl0716\test.ant
vhdl0716\test.fdo
vhdl0716\test.jhd
vhdl0716\test.tbw
vhdl0716\test.udo
vhdl0716\test.vhw
vhdl0716\test.xwv
vhdl0716\test.xwv_bak
vhdl0716\test_bencher.prj
vhdl0716\test_fifo.vhd
vhdl0716\test_top_wave.vhd
vhdl0716\test_top_wave_vhd.fdo
vhdl0716\test_top_wave_vhd.udo
vhdl0716\top_fmdm_project.bgn
vhdl0716\top_fmdm_project.bit
vhdl0716\top_fmdm_project.bld
vhdl0716\top_fmdm_project.cmd_log
vhdl0716\top_fmdm_project.drc
vhdl0716\top_fmdm_project.lso
vhdl0716\top_fmdm_project.mrp
vhdl0716\top_fmdm_project.nc1
vhdl0716\top_fmdm_project.ncd
vhdl0716\top_fmdm_project.ngc
vhdl0716\top_fmdm_project.ngd
vhdl0716\top_fmdm_project.ngm
vhdl0716\top_fmdm_project.ngr
vhdl0716\top_fmdm_project.pad
vhdl0716\top_fmdm_project.pad_txt
vhdl0716\top_fmdm_project.par
vhdl0716\top_fmdm_project.pcf
vhdl0716\top_fmdm_project.placed_ncd_tracker
vhdl0716\top_fmdm_project.prj
vhdl0716\top_fmdm_project.routed_ncd_tracker
vhdl0716\top_fmdm_project.stx
vhdl0716\top_fmdm_project.syr
vhdl0716\top_fmdm_project.twr
vhdl0716\top_fmdm_project.twx
vhdl0716\top_fmdm_project.ucf
vhdl0716\top_fmdm_project.ucf.untf
vhdl0716\top_fmdm_project.ut
vhdl0716\top_fmdm_project.vhd
vhdl0716\top_fmdm_project.xpi
vhdl0716\top_fmdm_project_cs.blc
vhdl0716\top_fmdm_project_cs.ngc
vhdl0716\top_fmdm_project_last_par.ncd
vhdl0716\top_fmdm_project_map.ncd
vhdl0716\top_fmdm_project_map.ngm
vhdl0716\top_fmdm_project_pad.csv
vhdl0716\top_fmdm_project_pad.txt
vhdl0716\top_fmdm_project_summary.html
vhdl0716\top_uart.vhd
vhdl0716\transcript
vhdl0716\transfer.vhd
vhdl0716\vsim.wlf
vhdl0716\wide_narrow_pulse.ado
vhdl0716\wide_narrow_pulse.ano
vhdl0716\wide_narrow_pulse.ant
vhdl0716\wide_narrow_pulse.fdo
vhdl0716\wide_narrow_pulse.tbw
vhdl0716\wide_narrow_pulse.udo
vhdl0716\wide_narrow_pulse.vhw
vhdl0716\wide_narrow_pulse.xwv
vhdl0716\wide_narrow_pulse.xwv_bak
vhdl0716\wide_narrow_pulse_bencher.prj
vhdl0716\work\accumulator_ctr_dataadjust\behavioral.asm
vhdl0716\work\accumulator_ctr_dataadjust\behavioral.dat
vhdl0716\work\accumulator_ctr_dataadjust\_primary.dat
vhdl0716\work\accumulator_ctr_dataadjust
vhdl0716\work\adc_control\behavioral.asm
vhdl0716\work\adc_control\behavioral.dat
vhdl0716\work\adc_control\_primary.dat
vhdl0716\work\adc_control
vhdl0716\work\add_accumulator\behavioral.asm
vhdl0716\work\add_accumulator\behavioral.dat
vhdl0716\work\add_accumulator\_primary.dat
vhdl0716\work\add_accumulator
vhdl0716\work\baud\behavioral.asm
vhdl0716\work\baud\behavioral.dat
vhdl0716\work\baud\_primary.dat
vhdl0716\work\baud
vhdl0716\work\ctr_wide_narrow\testbench_arch.asm
vhdl0716\work\ctr_wide_narrow\testbench_arch.dat
vhdl0716\work\ctr_wide_narrow\_primary.dat
vhdl0716\work\ctr_wide_narrow
vhdl0716\work\dataformat_adjust_log\behavioral.asm
vhdl0716\work\dataformat_adjust_log\behavioral.dat
vhdl0716\work\dataformat_adjust_log\_primary.dat
vhdl0716\work\dataformat_adjust_log
vhdl0716\work\dataformat_adjust_narrowfreq\behavioral.asm
vhdl0716\work\dataformat_adjust_narrowfreq\behavioral.dat
vhdl0716\work\dataformat_adjust_narrowfreq\_primary.dat
vhdl0716\work\dataformat_adjust_narrowfreq
vhdl0716\work\dataformat_adjust_widefreq\behavioral.asm
vhdl0716\work\dataformat_adjust_widefreq\behavioral.dat
vhdl0716\work\dataformat_adjust_widefreq\_primary.dat
vhdl0716\work\dataformat_adjust_widefreq
vhdl0716\work\fifo_rs232\fifo_rs232_a.asm
vhdl0716\work\fifo_rs232\fifo_rs232_a.dat
vhdl0716\work\fifo_rs232\_primary.dat
vhdl0716\work\fifo_rs232
vhdl0716\work\mux_log_wide_narrow\behavioral.asm
vhdl0716\work\mux_log_wide_narrow\behavioral.dat
vhdl0716\work\mux_log_wide_narrow\_primary.dat
vhdl0716\work\mux_log_wide_narrow
vhdl0716\work\narrow_wide_pulse_generate\behavioral.asm
vhdl0716\work\narrow_wide_pulse_generate\behavioral.dat
vhdl0716\work\narrow_wide_pulse_generate\_primary.dat
vhdl0716\work\narrow_wide_pulse_generate
vhdl0716\work\readfifo_rs232\behavioral.asm
vhdl0716\work\readfifo_rs232\behavioral.dat
vhdl0716\work\readfifo_rs232\_primary.dat
vhdl0716\work\readfifo_rs232
vhdl0716\work\reciever\behavioral.asm
vhdl0716\work\reciever\behavioral.dat
vhdl0716\work\reciever\_primary.dat
vhdl0716\work\reciever
vhdl0716\work\select_clk\behavioral.asm
vhdl0716\work\select_clk\behavioral.dat
vhdl0716\work\select_clk\_primary.dat
vhdl0716\work\select_clk
vhdl0716\work\test\testbench_arch.asm
vhdl0716\work\test\testbench_arch.dat
vhdl0716\work\test\_primary.dat
vhdl0716\work\test
vhdl0716\work\test_top_wave_vhd\behavior.asm
vhdl0716\work\test_top_wave_vhd\behavior.dat
vhdl0716\work\test_top_wave_vhd\_primary.dat
vhdl0716\work\test_top_wave_vhd
vhdl0716\work\top_fmdm_project\behavioral.asm
vhdl0716\work\top_fmdm_project\behavioral.dat
vhdl0716\work\top_fmdm_project\_primary.dat
vhdl0716\work\top_fmdm_project
vhdl0716\work\top_uart\behavioral.asm
vhdl0716\work\top_uart\behavioral.dat
vhdl0716\work\top_uart\_primary.dat
vhdl0716\work\top_uart
vhdl0716\work\transfer\behavioral.asm
vhdl0716\work\transfer\behavioral.dat
vhdl0716\work\transfer\_primary.dat
vhdl0716\work\transfer
vhdl0716\work\wide_narrow_pulse\testbench_arch.asm
vhdl0716\work\wide_narrow_pulse\testbench_arch.dat
vhdl0716\work\wide_narrow_pulse\_primary.dat
vhdl0716\work\wide_narrow_pulse
vhdl0716\work\_info
vhdl0716\work
vhdl0716\xst\dump.xst\narrow_wide_pulse_generate.prj\ngx\notopt
vhdl0716\xst\dump.xst\narrow_wide_pulse_generate.prj\ngx\opt
vhdl0716\xst\dump.xst\narrow_wide_pulse_generate.prj\ngx
vhdl0716\xst\dump.xst\narrow_wide_pulse_generate.prj
vhdl0716\xst\dump.xst\top_fmdm_project.prj\ngx\notopt
vhdl0716\xst\dump.xst\top_fmdm_project.prj\ngx\opt
vhdl0716\xst\dump.xst\top_fmdm_project.prj\ngx
vhdl0716\xst\dump.xst\top_fmdm_project.prj
vhdl0716\xst\dump.xst
vhdl0716\xst\work\hdllib.ref
vhdl0716\xst\work\hdpdeps.ref
vhdl0716\xst\work\sub00\vhpl00.vho
vhdl0716\xst\work\sub00\vhpl01.vho
vhdl0716\xst\work\sub00\vhpl02.vho
vhdl0716\xst\work\sub00\vhpl03.vho
vhdl0716\xst\work\sub00\vhpl04.vho
vhdl0716\xst\work\sub00\vhpl05.vho
vhdl0716\xst\work\sub00\vhpl06.vho
vhdl0716\xst\work\sub00\vhpl07.vho
vhdl0716\xst\work\sub00\vhpl08.vho
vhdl0716\xst\work\sub00\vhpl09.vho
vhdl0716\xst\work\sub00\vhpl10.vho
vhdl0716\xst\work\sub00\vhpl11.vho
vhdl0716\xst\work\sub00\vhpl12.vho
vhdl0716\xst\work\sub00\vhpl13.vho
vhdl0716\xst\work\sub00\vhpl14.vho
vhdl0716\xst\work\sub00\vhpl15.vho
vhdl0716\xst\work\sub00\vhpl16.vho
vhdl0716\xst\work\sub00\vhpl17.vho
vhdl0716\xst\work\sub00\vhpl18.vho
vhdl0716\xst\work\sub00\vhpl19.vho
vhdl0716\xst\work\sub00\vhpl20.vho
vhdl0716\xst\work\sub00\vhpl21.vho
vhdl0716\xst\work\sub00\vhpl22.vho
vhdl0716\xst\work\sub00\vhpl23.vho
vhdl0716\xst\work\sub00\vhpl24.vho
vhdl0716\xst\work\sub00\vhpl25.vho
vhdl0716\xst\work\sub00\vhpl26.vho
vhdl0716\xst\work\sub00\vhpl27.vho
vhdl0716\xst\work\sub00\vhpl28.vho
vhdl0716\xst\work\sub00\vhpl29.vho
vhdl0716\xst\work\sub00
vhdl0716\xst\work
vhdl0716\xst
vhdl0716\_impact.cmd
vhdl0716\_impact.log
vhdl0716\_ngo\fifo_rs232.ngo
vhdl0716\_ngo\icon_pro.edn
vhdl0716\_ngo\icon_pro.ncf
vhdl0716\_ngo\icon_pro.ngo
vhdl0716\_ngo\ila_pro_0.edn
vhdl0716\_ngo\ila_pro_0.ncf
vhdl0716\_ngo\ila_pro_0.ngo
vhdl0716\_ngo\netlist.lst
vhdl0716\_ngo\top_fmdm_project_cs_signalbrowser.ngo
vhdl0716\_ngo\top_fmdm_project_cs_signalbrowser.ver
vhdl0716\_ngo
vhdl0716\_xmsgs
vhdl0716\__projnav\0716.gfl
vhdl0716\__projnav\0716_flowplus.gfl
vhdl0716\__projnav\bitgen.rsp
vhdl0716\__projnav\ednTOngd_tcl.rsp
vhdl0716\__projnav\narrow_wide_pulse_generate.xst
vhdl0716\__projnav\nc1TOncd_tcl.rsp
vhdl0716\__projnav\runXst_tcl.rsp
vhdl0716\__projnav\sumrpt_tcl.rsp
vhdl0716\__projnav\top_fmdm_project.xst
vhdl0716\__projnav\top_fmdm_project_ncdTOut_tcl.rsp
vhdl0716\__projnav
vhdl0716\__projnav.log
vhdl0716

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