With verilog language, mainly in the FPGA the role of a simple spreadsheet, use the clock to achieve control of six digital display

electric_timer_qutus\counter.asm.rpt
....................\counter.cdf
....................\counter.done
....................\counter.dpf
....................\counter.fit.eqn
....................\counter.fit.rpt
....................\counter.fit.smsg
....................\counter.fit.summary
....................\counter.flow.rpt
....................\counter.map.eqn
....................\counter.map.rpt
....................\counter.map.summary
....................\counter.pin
....................\counter.pof
....................\counter.qsf
....................\counter.sof
....................\counter.tan.rpt
....................\counter.tan.summary
....................\counter.vhd
....................\counter.vhd.bak
....................\db\counter.asm.qmsg
....................\..\counter.asm_labs.ddb
....................\..\counter.cbx.xml
....................\..\counter.cmp.bpm
....................\..\counter.cmp.cdb
....................\..\counter.cmp.ecobp
....................\..\counter.cmp.hdb
....................\..\counter.cmp.logdb
....................\..\counter.cmp.rdb
....................\..\counter.cmp.tdb
....................\..\counter.cmp0.ddb
....................\..\counter.db_info
....................\..\counter.eco.cdb
....................\..\counter.fit.qmsg
....................\..\counter.hier_info
....................\..\counter.hif
....................\..\counter.map.bpm
....................\..\counter.map.cdb
....................\..\counter.map.ecobp
....................\..\counter.map.hdb
....................\..\counter.map.logdb
....................\..\counter.map.qmsg
....................\..\counter.map_bb.cdb
....................\..\counter.map_bb.hdb
....................\..\counter.map_bb.hdbx
....................\..\counter.map_bb.logdb
....................\..\counter.pre_map.cdb
....................\..\counter.pre_map.hdb
....................\..\counter.psp
....................\..\counter.root_partition.cmp.atm
....................\..\counter.root_partition.cmp.dfp
....................\..\counter.root_partition.cmp.hdbx
....................\..\counter.root_partition.cmp.logdb
....................\..\counter.root_partition.cmp.rcf
....................\..\counter.root_partition.map.atm
....................\..\counter.root_partition.map.hdbx
....................\..\counter.root_partition.map.info
....................\..\counter.rtlv.hdb
....................\..\counter.rtlv_sg.cdb
....................\..\counter.rtlv_sg_swap.cdb
....................\..\counter.sgdiff.cdb
....................\..\counter.sgdiff.hdb
....................\..\counter.signalprobe.cdb
....................\..\counter.sld_design_entry.sci
....................\..\counter.sld_design_entry_dsc.sci
....................\..\counter.syn_hier_info
....................\..\counter.tan.qmsg
....................\..\counter.tis_db_list.ddb
....................\..\counter.tmw_info
....................\..\prev_cmp_counter.asm.qmsg
....................\..\prev_cmp_counter.fit.qmsg
....................\..\prev_cmp_counter.map.qmsg
....................\..\prev_cmp_counter.tan.qmsg
....................\..\prev_cmp_timer.qmsg
....................\divider_1m.vhd
....................\divider_1m.vhd.bak
....................\myfifo.bsf
....................\myfifo.qip
....................\myfifo.v
....................\myfifo_wave0.jpg
....................\myfifo_wave1.jpg
....................\myfifo_waveforms.html
....................\reset.vhd
....................\reset.vhd.bak
....................\se7_display.vhd
....................\se7_display.vhd.bak
....................\shiyan.bsf
....................\shiyan.qip
....................\shiyan.v
....................\shiyan_wave0.jpg
....................\shiyan_waveforms.html
....................\timer.qpf
....................\timer.qws
....................\db
electric_timer_qutus

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