Classic Verilog source code, including adders, filters and qpsk design, etc.

陈曦源代码\chapter10\11.2节\DESCRAMBLER.v
..........\.........\......\PARALLEL_SCRAMBLER.v
..........\.........\......\PARALLEL_SCRAM_TEST.v
..........\.........\......\PARALLER_DESCRAMBLER.v
..........\.........\......\SCRAMBLER.v
..........\.........\......\SCRAM_TEST.v
..........\.........\...3节\CRC16.v
..........\.........\......\CRC_16_PARALLEL.v
..........\.........\...4节\SDH_STM1.v
..........\.........\...5节\DECODE_8B_10B.v
..........\.........\......\ENCODE_8B_10B.v
..........\.......4\add_full.v
..........\........\add_half.v
..........\........\count16.v
..........\........\decode3to8.v
..........\........\fifo3.v
..........\........\fre13.v
..........\........\mult1from8.v
..........\........\ram_4_4.v
..........\........\rom_16_4.v
..........\........\ser_to_parr.v
..........\........\trigger_d.v
..........\........\trigger_jk.v
..........\........\trigger_rs.v
..........\.......5\cic_filter_3__28_ho.v
..........\........\cic_insert_3_2_8_ho.v
..........\........\decimate_4.v
..........\........\fir_lp_8.v
..........\........\fir_parr_8.v
..........\........\iir_cascade_2.v
..........\........\iir_filter_8.v
..........\........\insert_4.v
..........\.......6\ask_2.v
..........\........\ask_2_de.v
..........\........\fsk_2.v
..........\........\fsk_2_de.v
..........\........\ppm.v
..........\........\ppm_de.v
..........\........\psk_2.v
..........\........\psk_2_de.v
..........\........\qpsk.v
..........\........\qpsk_de.v
..........\.......7\CONTROLLER.v
..........\........\CSEEBLOCK.v
..........\........\KESBLOCK.V
..........\........\RSDECODER.v
..........\........\RS_ENCODER.V
..........\........\SCBLOCK.V
..........\.......8\8.2节\GENSQUE.v
..........\........\.....\GOLD_SQUE_GEN.v
..........\........\..3节\SPR_SPECTRUM_MOD.v
..........\........\..4节\CATCH_TOP.v
..........\........\.....\CATCH_TOP.v.bak
..........\........\.....\GATE_CONTROL.v
..........\........\.....\GATE_CONTROL.v.bak
..........\........\.....\GENSQUE.v
..........\........\.....\GENSQUE.v.bak
..........\........\.....\SERIAL_SOLVE.v
..........\........\.....\SERIAL_SOLVE.v.bak
..........\........\.....\SERIAL_TO_PARALLEL.v
..........\........\.....\SERIAL_TO_PARALLEL.v.bak
..........\........\.....\TESTBENCH.v
..........\........\.....\TESTBENCH.v.bak
..........\.......9\BAUD_GENERATER.v
..........\........\SERIAL_CONTROLLER.v
..........\........\UART_RECEIVER.v
..........\........\UART_TRANSMITTER.v
..........\.......10\11.2节
..........\.........\11.3节
..........\.........\11.4节
..........\.........\11.5节
..........\.......8\8.2节
..........\........\8.3节
..........\........\8.4节
..........\chapter10
..........\chapter4
..........\chapter5
..........\chapter6
..........\chapter7
..........\chapter8
..........\chapter9
陈曦源代码

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