Based on the FPGA and computer serial port communication!

computer\cmp_state.ini
........\db\add_sub_5ph.tdf
........\..\add_sub_aph.tdf
........\..\serial.asm.qmsg
........\..\serial.asm_labs.ddb
........\..\serial.cbx.xml
........\..\serial.cmp.cdb
........\..\serial.cmp.hdb
........\..\serial.cmp.kpt
........\..\serial.cmp.logdb
........\..\serial.cmp.rdb
........\..\serial.cmp.tdb
........\..\serial.cmp0.ddb
........\..\serial.cmp2.ddb
........\..\serial.db_info
........\..\serial.eco.cdb
........\..\serial.fit.qmsg
........\..\serial.hier_info
........\..\serial.hif
........\..\serial.lpc.html
........\..\serial.lpc.rdb
........\..\serial.lpc.txt
........\..\serial.map.cdb
........\..\serial.map.hdb
........\..\serial.map.logdb
........\..\serial.map.qmsg
........\..\serial.pre_map.cdb
........\..\serial.pre_map.hdb
........\..\serial.rtlv.hdb
........\..\serial.rtlv_sg.cdb
........\..\serial.rtlv_sg_swap.cdb
........\..\serial.sgdiff.cdb
........\..\serial.sgdiff.hdb
........\..\serial.sld_design_entry.sci
........\..\serial.sld_design_entry_dsc.sci
........\..\serial.syn_hier_info
........\..\serial.tan.qmsg
........\..\serial.tis_db_list.ddb
........\..\serial_cmp.qrpt
........\incremental_db\compiled_partitions\serial.root_partition.map.kpt
........\..............\README
........\serial.asm.rpt
........\serial.cdf
........\serial.done
........\serial.dpf
........\serial.fit.eqn
........\serial.fit.rpt
........\serial.fit.smsg
........\serial.fit.summary
........\serial.flow.rpt
........\serial.map.eqn
........\serial.map.rpt
........\serial.map.summary
........\serial.pin
........\serial.pof
........\serial.qpf
........\serial.qsf
........\serial.qws
........\serial.sof
........\serial.tan.rpt
........\serial.tan.summary
........\serial.v
........\serial.v.bak
........\serial_assignment_defaults.qdf
........\incremental_db\compiled_partitions
........\db
........\incremental_db
computer

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