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DDRsdram2

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 947kb
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  • Author :召唤
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Introduction - If you have any usage issues, please Google them yourself
A DDR2 controller source code, which is generated by the compiler LATTICE.
Packet file list
(Preview for download)
DDRsdram2\DDRsdram2\ddr2.cmd
.........\.........\ddr2.lpc
.........\.........\ddr2.ngo
.........\.........\ddr2_bb.v
.........\.........\ddr2_beh.v
.........\.........\ddr2_filelist.log
.........\.........\ddr2_gen.log
.........\.........\ddr2_generate.log
.........\.........\ddr2_generate.tcl
.........\.........\ddr2_inst.v
.........\.........\..._p_eval\ddr2\impl\automake.log
.........\.........\..........\....\....\backup\ddr_sdram_mem_top.log
.........\.........\..........\....\....\bidi_cell.naf
.........\.........\..........\....\....\bidi_dqs.naf
.........\.........\..........\....\....\ddr2.naf
.........\.........\..........\....\....\ddr2.ngo
.........\.........\..........\....\....\ddr2_bb.jhd
.........\.........\..........\....\....\DDR2_eval.h
.........\.........\..........\....\....\DDR2_eval.ini
.........\.........\..........\....\....\ddr2_eval.jid
.........\.........\..........\....\....\DDR2_eval.lci
.........\.........\..........\....\....\DDR2_eval.lct
.........\.........\..........\....\....\ddr2_eval.lpf
.........\.........\..........\....\....\DDR2_eval.mt
.........\.........\..........\....\....\DDR2_eval.pt
.........\.........\..........\....\....\ddr2_eval.rev
.........\.........\..........\....\....\ddr2_eval.rvp
.........\.........\..........\....\....\DDR2_eval.sty
.........\.........\..........\....\....\ddr2_eval.syn
.........\.........\..........\....\....\DDR2_eval.tcl
.........\.........\..........\....\....\ddr2_eval_precision.lpf
.........\.........\..........\....\....\ddr2_eval_synplify.lpf
.........\.........\..........\....\....\DDR2_eval_tcl.ini
.........\.........\..........\....\....\ddr_data_io.jhd
.........\.........\..........\....\....\ddr_data_io.naf
.........\.........\..........\....\....\ddr_dm_io.jhd
.........\.........\..........\....\....\ddr_dm_io.naf
.........\.........\..........\....\....\ddr_dqs_io.jhd
.........\.........\..........\....\....\ddr_dqs_io.naf
.........\.........\..........\....\....\ddr_sdram_mem_io_top.jhd
.........\.........\..........\....\....\ddr_sdram_mem_io_top.naf
.........\.........\..........\....\....\ddr_sdram_mem_params.v
.........\.........\..........\....\....\ddr_sdram_mem_top.cmd
.........\.........\..........\....\....\ddr_sdram_mem_top.edi
.........\.........\..........\....\....\ddr_sdram_mem_top.jhd
.........\.........\..........\....\....\ddr_sdram_mem_top.log
.........\.........\..........\....\....\ddr_sdram_mem_top.naf
.........\.........\..........\....\....\ddr_sdram_mem_top.sdc
.........\.........\..........\....\....\ddr_sdram_mem_top.srd
.........\.........\..........\....\....\ddr_sdram_mem_top.srm
.........\.........\..........\....\....\ddr_sdram_mem_top.srs
.........\.........\..........\....\....\ddr_sdram_mem_top.szr
.........\.........\..........\....\....\ddr_sdram_mem_top.tlg
.........\.........\..........\....\....\ddr_sdram_mem_top.vhm
.........\.........\..........\....\....\ddr_sdram_mem_top.vm
.........\.........\..........\....\....\kbar_clk_pll.jhd
.........\.........\..........\....\....\kbar_clk_pll.naf
.........\.........\..........\....\....\par\ddr2.ngo
.........\.........\..........\....\....\...\ddr2_eval.lpf
.........\.........\..........\....\....\...\ddr2_eval.p2t
.........\.........\..........\....\....\...\ddr2_eval.p3t
.........\.........\..........\....\....\...\ddr2_eval.pt
.........\.........\..........\....\....\...\ddr_sdram_mem_params.v
.........\.........\..........\....\....\...\ddr_sdram_mem_top.sdc
.........\.........\..........\....\....\...\post_route_trace_synplify.prf
.........\.........\..........\....\....\...\runpar_ddr2_top.cmd
.........\.........\..........\....\....\pll.jhd
.........\.........\..........\....\....\pll.lpc
.........\.........\..........\....\....\pll.naf
.........\.........\..........\....\....\pll.sym
.........\.........\..........\....\....\pll_120M.cmd
.........\.........\..........\....\....\pll_120M.edi
.........\.........\..........\....\....\pll_120M.jhd
.........\.........\..........\....\....\pll_120M.log
.........\.........\..........\....\....\p
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