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S2_38yima

  • Category : VHDL-FPGA-Verilog
  • Tags :
  • Update : 2012-11-26
  • Size : 58kb
  • Downloaded :0次
  • Author :袁方
  • About : Nobody
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Introduction - If you have any usage issues, please Google them yourself
1 copy of the program 3/8 decoder function 2, 3 DIP switch from the input, led output.
Packet file list
(Preview for download)
proj\cmp_state.ini
....\translater38.asm.rpt
....\translater38.cdf
....\translater38.done
....\translater38.fit.eqn
....\translater38.fit.rpt
....\translater38.fit.smsg
....\translater38.fit.summary
....\translater38.flow.rpt
....\translater38.map.eqn
....\translater38.map.rpt
....\translater38.map.summary
....\translater38.pin
....\translater38.pof
....\translater38.qpf
....\translater38.qsf
....\translater38.qws
....\translater38.sim.rpt
....\translater38.sof
....\translater38.tan.rpt
....\translater38.tan.summary
....\translater38.v
....\translater38.v.bak
....\translater38.vwf
....\translater38_assignment_defaults.qdf
说明.txt
proj
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