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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 577kb
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  • Author :deepak
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Introduction - If you have any usage issues, please Google them yourself
adder in vhdl , ff , using xilinx ise
Packet file list
(Preview for download)
adder\add.v
adder
.....\ff23\__ISE_repository_ff23.ise_.lock
.....\....\ff23.ise
.....\....\ff23.restore
.....\....\b_beh.prj
.....\....\xilinxsim.ini
.....\....\b_isim_beh.exe
.....\....\isim.cmd
.....\....\isim.log
.....\....\isimwavedata.xwv
.....\....\dff.lso
.....\....\ff23.ise_ISE_Backup
.....\....\isim.hdlsourcefiles
.....\....\simulate_dofile.log
.....\....\b_isim_beh.wfs
.....\....\.lso
.....\....\dff.cmd_log
.....\....\dff.syr
.....\....\ff23.ntrc_log
.....\....\simulate_dofile.log_back
.....\....\dff.ngr
.....\....\dff.ngc
.....\....\b.xwv
.....\....\jkff_beh.prj
.....\....\b.ant
.....\....\b.jhd
.....\....\jkff_bencher.prj
.....\....\jkff.xwv
.....\....\jkff.xwv_bak
.....\....\jkff.tfw
.....\....\jkff.ant
.....\....\jkff.tbw
.....\....\jkff.jhd
.....\....\jkff_isim_beh.exe
.....\....\jkff_isim_beh.wfs
.....\....\b.v
.....\....\b_summary.html
.....\....\dff_summary.html
.....\....\dff.prj
.....\....\dff.xst
.....\....\dff.stx
.....\....\b_bencher.prj
.....\....\b.xwv_bak
.....\....\b.tbw
.....\....\xst\dump.xst\dff.prj\ntrc.scr
.....\....\...\work\hdllib.ref
.....\....\...\....\vlg28\dff.bin
.....\....\isim.tmp_save\_1
.....\....\_xmsgs\fuse.xmsgs
.....\....\......\xst.xmsgs
.....\....\isim\work\hdllib.ref
.....\....\....\....\hdpdeps.ref
.....\....\....\....\jkff\jkff.h
.....\....\....\....\....\xsimjkff.cpp
.....\....\....\....\....\mingw\jkff.obj
.....\....\....\....\vlg19\jkff.bin
.....\....\....\....\glbl\glbl.h
.....\....\....\....\....\mingw\glbl.obj
.....\....\....\....\vlg2D\glbl.bin
.....\....\....\....\b\b.h
.....\....\....\....\.\xsimb.cpp
.....\....\....\....\.\mingw\b.obj
.....\....\....\....\vlg62\b.bin
.....\....\....\....\dff\dff.h
.....\....\....\....\...\mingw\dff.obj
.....\....\....\....\vlg28\dff.bin
.....\4bit_encoder\4bit_encoder.ise
.....\............\4bit_encoder.restore
.....\............\4bit_encoder.ise_ISE_Backup
.....\............\4bit_encoder.v
.....\............\4bit_encoder_ise9migration.zip
.....\.x1mux\4x1mux.ise_ISE_Backup
.....\......\4x1mux.restore
.....\......\4x1mux.ise
.....\ff23\xst\dump.xst\dff.prj\ngx\notopt
.....\....\...\........\.......\...\opt
.....\....\...\........\.......\ngx
.....\....\isim\work\jkff\mingw
.....\....\....\....\glbl\mingw
.....\....\....\....\b\mingw
.....\....\....\....\dff\mingw
.....\....\xst\dump.xst\dff.prj
.....\....\...\work\vlg28
.....\....\isim\work\jkff
.....\....\....\....\vlg19
.....\....\....\....\glbl
.....\....\....\....\vlg2D
.....\....\....\....\b
.....\....\....\....\vlg62
.....\....\....\....\dff
.....\....\....\....\vlg28
.....\....\xst\dump.xst
.....\....\...\work
.....\....\...\projnav.tmp
.....\....\isim\work
.....\....\xst
.....\....\isim.tmp_save
.....\....\_xmsgs
.....\....\isim
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