USB interface. use EZ-USB FX2 carry out PC communication with FPGA by USB.

usb_wr_Verilog\db\USB_wr.db_info
..............\read me.txt
..............\transcript
..............\USB_wr.asm.rpt
..............\USB_wr.cdf
..............\USB_wr.done
..............\USB_wr.dpf
..............\USB_wr.fit.smsg
..............\USB_wr.fit.summary
..............\USB_wr.flow.rpt
..............\USB_wr.jdi
..............\USB_wr.map.rpt
..............\USB_wr.map.summary
..............\USB_wr.merge.rpt
..............\USB_wr.pin
..............\USB_wr.qpf
..............\USB_wr.qsf
..............\USB_wr.qws
..............\USB_wr.tan.summary
..............\USB_wr.v
..............\USB_wr.v.bak
..............\db
usb_wr_Verilog

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