This is pci-wishbone nuclear and 16450 serial port on the nucleus in xilinx FPGA-implemented.

PCI_Bridge_Guest_UART
.....................\.recordref
.....................\automake.log
.....................\bus_commands.v
.....................\coregen.log
.....................\coregen.prj
.....................\cur_state.txt
.....................\c_state.txt
.....................\dma_state_o_1.txt
.....................\dpramb.asy
.....................\dpramb.edn
.....................\dpramb.ngo
.....................\dpramb.sym
.....................\dpramb.v
.....................\dpramb.veo
.....................\dpramb.vhd
.....................\dpramb.vho
.....................\dpramb.xco
.....................\dpramb.xcp
.....................\dpramb_flist.txt
.....................\fsmviewer.fsm
.....................\pcibridgeguestram.mcs
.....................\pcibridgeguestram.prm
.....................\pcibridgeguestram.sig
.....................\pcibridgeguest_uart.ise
.....................\pcibridgeguest_uart.mcs
.....................\pcibridgeguest_uart.prm
.....................\pcibridgeguest_uart.sig
.....................\pci_async_reset_flop.v
.....................\pci_bridge.ucf
.....................\pci_bridge32.edn
.....................\pci_bridge32.fse
.....................\pci_bridge32.ncf
.....................\pci_bridge32.sdc
.....................\pci_bridge32.srd
.....................\pci_bridge32.tlg
.....................\pci_bridge32.v
.....................\pci_bridge32.vtc
.....................\pci_bridge32_fsm.sdc
.....................\pci_cbe_en_crit.v
.....................\pci_conf_cyc_addr_dec.v
.....................\pci_conf_space.v
.....................\pci_constants.v
.....................\pci_crt.ucf
.....................\pci_cur_out_reg.v
.....................\pci_delayed_sync.v
.....................\pci_delayed_write_reg.v
.....................\pci_frame_crit.v
.....................\pci_frame_en_crit.v
.....................\pci_frame_load_crit.v
.....................\pci_in_reg.v
.....................\pci_io_mux.v
.....................\pci_io_mux_ad_en_crit.v
.....................\pci_io_mux_ad_load_crit.v
.....................\pci_irdy_out_crit.v
.....................\pci_master32_sm.v
.....................\pci_master32_sm_if.v
.....................\pci_mas_ad_en_crit.v
.....................\pci_mas_ad_load_crit.v
.....................\pci_mas_ch_state_crit.v
.....................\pci_out_reg.v
.....................\pci_parity_check.v
.....................\pci_par_crit.v
.....................\pci_pcir_fifo_control.v
.....................\pci_pciw_fifo_control.v
.....................\pci_pciw_pcir_fifos.v
.....................\pci_pci_decoder.v
.....................\pci_pci_tpram.v
.....................\pci_perr_crit.v
.....................\pci_perr_en_crit.v
.....................\pci_ram_16x40d.v
.....................\pci_rst_int.v
.....................\pci_serr_crit.v
.....................\pci_serr_en_crit.v
.....................\pci_spoci_ctrl.v
.....................\pci_synchronizer_flop.v
.....................\pci_sync_module.v
.....................\pci_target32_clk_en.v
.....................\pci_target32_devs_crit.v
.....................\pci_target32_interface.v
.....................\pci_target32_sm.v
.....................\pci_target32_stop_crit.v
.....................\pci_target32_trdy_crit.v
.....................\pci_target_unit.pci_target_sm.c_state.txt
.....................\pci_target_unit.v
.....................\pci_target_unit.wishbone_master.c_state.txt
.....................\pci_uart.ucf
.....................\pci_user_constants.v
.....................\pci_wbr_fifo_control.v
.....................\pci_wbs_wbb3_2_wbb2.v
.....................\pci_wbw_fifo_control.v
.....................\pci_wbw_wbr_fifos.v
.....................\pci_wb_addr_mux.v
.....................\pci_wb_decoder.v
.....................\pci_wb_master.v
.....................\pci_wb_slave.v
.....................\pci_wb_slave_unit.v
.....................\pci_wb_tpram.v
.....................\ping4.v
.....................\prjname.lso

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