A full-adder algorithm is based on the VHDL software emulation. Please download the reference!

half_adder
..........\Generic
..........\.......\contents.lib~
..........\.......\Generic.cfg
..........\.......\half_adder.erf
..........\.......\half_adder.wsp
..........\.......\sources.sth
..........\.......\wave.dat
..........\half_adder.adf
..........\half_adder.lib
..........\half_adder.mgf
..........\log
..........\...\compile.log
..........\...\console.log
..........\...\find.log
..........\...\simulation.log
..........\src
..........\...\component_1.bak
..........\...\component_1.VHD
..........\...\component_2.VHD
..........\...\Half_adder.bak
..........\...\Half_adder.VHD
..........\...\half_adder1.vhd
..........\...\TestBench
..........\...\.........\Half_adder_TB.bak
..........\...\.........\Half_adder_TB.vhd
..........\...\.........\Half_adder_TB_runtest.do
..........\...\Waveform.awf
..........\...\Waveform1.awf
..........\...\Waveform2.awf
..........\...\Waveform3.awf

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