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Location : Home Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 1.39mb
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  • Author :nilo
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Introduction - If you have any usage issues, please Google them yourself
FPGA external circuit components library PROTEL
Packet file list
(Preview for download)
EDA_VI
......\altera_vhdl_support.vhd
......\button_pio.vhd
......\cpu.ocp
......\cpu.sdc
......\cpu.vhd
......\cpu_ic_tag_ram.mif
......\cpu_jtag_debug_module.vhd
......\cpu_jtag_debug_module_sysclk.vhd
......\cpu_jtag_debug_module_tck.vhd
......\cpu_jtag_debug_module_wrapper.vhd
......\cpu_ociram_default_contents.mif
......\cpu_oci_test_bench.vhd
......\cpu_rf_ram_a.mif
......\cpu_rf_ram_b.mif
......\cpu_test_bench.vhd
......\db
......\..\altsyncram_5p61.tdf
......\..\altsyncram_6u21.tdf
......\..\altsyncram_ak41.tdf
......\..\altsyncram_bhc1.tdf
......\..\altsyncram_cf61.tdf
......\..\altsyncram_cro1.tdf
......\..\altsyncram_df61.tdf
......\..\altsyncram_rmv1.tdf
......\..\a_dpfifo_83p.tdf
......\..\a_fefifo_7cf.tdf
......\..\cntr_9c7.tdf
......\..\cntr_m3c.tdf
......\..\cntr_rd8.tdf
......\..\decode_9ie.tdf
......\..\dpram_75p.tdf
......\..\eplay.cbx.xml
......\..\eplay.cmp.rdb
......\..\eplay.db_info
......\..\eplay.eco.cdb
......\..\eplay.map.hdb
......\..\eplay.map.qmsg
......\..\eplay.sld_design_entry.sci
......\..\E_Play.db_info
......\..\scfifo_1to.tdf
......\delay_reset_block.bdf
......\delay_reset_block.bsf
......\eplay.flow.rpt
......\eplay.map.rpt
......\eplay.map.summary
......\eplay.qpf
......\eplay.qsf
......\eplay.qws
......\E_Play.asm.rpt
......\E_Play.bdf
......\E_Play.done
......\E_Play.fit.eqn
......\E_Play.fit.rpt
......\E_Play.fit.summary
......\E_Play.flow.rpt
......\E_Play.map.eqn
......\E_Play.map.rpt
......\E_Play.map.summary
......\E_Play.pin
......\E_Play.pof
......\E_Play.pow.rpt
......\E_Play.pow.summary
......\E_Play.qpf
......\E_Play.qsf
......\E_Play.qws
......\E_Play.sof
......\E_Play.tan.rpt
......\E_Play.tan.summary
......\ic_tag_ram.mif
......\jtag_uart.vhd
......\led_pio.vhd
......\My_PLL.bsf
......\My_PLL.cmp
......\My_PLL.inc
......\My_PLL.tdf
......\My_PLL_inst.tdf

......\My_PLL_waveforms.html
......\onchip_RAM.hex
......\onchip_RAM.vhd
......\reset_counter.v
......\rf_ram_a.mif
......\rf_ram_b.mif
......\software
......\........\hello_led
......\........\.........\.cdtbuild
......\........\.........\.cdtproject
......\........\.........\.project
......\........\.........\application.stf
......\........\.........\Debug
......\........\.........\.....\generated_app.sh
......\........\.........\.....\hello_led.elf
......\........\.........\.....\makefile
......\........\.........\.....\obj
......\........\.........\.....\...\hello_led.d
......\........\.........\.....\...\hello_led.o
......\........\.........\.....\subdir.mk
......\........\.........\hello_led.c
......\........\.........\readme.txt
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