Introduction - If you have any usage issues, please Google them yourself
traffic lights to achieve the state machine, with verilog HDL programming, Xilinx ISE 6 simulation, the actual circuit have been tested.
Packet : 83390085trafficlight-verilog.rar filelist
trafficLight\Spartan-II Data Sheets.pdf
trafficLight\Xilinx ISE7[1].1入门导读.pdf
trafficLight\基于EDA-IV实验箱的FPGA开发流程.pdf
trafficLight\实验指导书.doc
trafficLight\实验教学大纲及汇总格式.doc
trafficLight\数字系统实验\2.txt
trafficLight\数字系统实验\exp2.txt
trafficLight\数字系统实验\原程序.doc
trafficLight\数字系统实验\新建 文本文档.txt
trafficLight\数字系统实验\端口.txt
trafficLight\数字系统实验二.doc
trafficLight\数字系统实验
trafficLight