Using vhdl language, and register through the adder to achieve the fpga functional dds

dds_first
.........\adder32.vhd
.........\adder8.vhd
.........\db
.........\..\altsyncram_pg71.tdf
.........\..\dds_first.asm.qmsg
.........\..\dds_first.asm_labs.ddb
.........\..\dds_first.cbx.xml
.........\..\dds_first.cmp.bpm
.........\..\dds_first.cmp.cdb
.........\..\dds_first.cmp.ecobp
.........\..\dds_first.cmp.hdb
.........\..\dds_first.cmp.logdb
.........\..\dds_first.cmp.rdb
.........\..\dds_first.cmp.tdb
.........\..\dds_first.cmp0.ddb
.........\..\dds_first.cmp2.ddb
.........\..\dds_first.db_info
.........\..\dds_first.eco.cdb
.........\..\dds_first.eds_overflow
.........\..\dds_first.fit.qmsg
.........\..\dds_first.fnsim.cdb
.........\..\dds_first.fnsim.hdb
.........\..\dds_first.fnsim.qmsg
.........\..\dds_first.hier_info
.........\..\dds_first.hif
.........\..\dds_first.map.bpm
.........\..\dds_first.map.cdb
.........\..\dds_first.map.ecobp
.........\..\dds_first.map.hdb
.........\..\dds_first.map.logdb
.........\..\dds_first.map.qmsg
.........\..\dds_first.map_bb.cdb
.........\..\dds_first.map_bb.hdb
.........\..\dds_first.map_bb.hdbx
.........\..\dds_first.map_bb.logdb
.........\..\dds_first.pre_map.cdb
.........\..\dds_first.pre_map.hdb
.........\..\dds_first.psp
.........\..\dds_first.root_partition.cmp.atm
.........\..\dds_first.root_partition.cmp.dfp
.........\..\dds_first.root_partition.cmp.hdbx
.........\..\dds_first.root_partition.cmp.logdb
.........\..\dds_first.root_partition.cmp.rcf
.........\..\dds_first.root_partition.map.atm
.........\..\dds_first.root_partition.map.hdbx
.........\..\dds_first.root_partition.map.info
.........\..\dds_first.rtlv.hdb
.........\..\dds_first.rtlv_sg.cdb
.........\..\dds_first.rtlv_sg_swap.cdb
.........\..\dds_first.sgdiff.cdb
.........\..\dds_first.sgdiff.hdb
.........\..\dds_first.signalprobe.cdb
.........\..\dds_first.sim.cvwf
.........\..\dds_first.sim.hdb
.........\..\dds_first.sim.qmsg
.........\..\dds_first.sim.rdb
.........\..\dds_first.sld_design_entry.sci
.........\..\dds_first.sld_design_entry_dsc.sci
.........\..\dds_first.syn_hier_info
.........\..\dds_first.tan.qmsg
.........\..\dds_first.tis_db_list.ddb
.........\..\dds_first.tmw_info
.........\..\prev_cmp_dds_first.asm.qmsg
.........\..\prev_cmp_dds_first.fit.qmsg
.........\..\prev_cmp_dds_first.map.qmsg
.........\..\prev_cmp_dds_first.qmsg
.........\..\prev_cmp_dds_first.sim.qmsg
.........\..\prev_cmp_dds_first.tan.qmsg
.........\..\wed.wsf
.........\dds_first.asm.rpt
.........\dds_first.done
.........\dds_first.fit.rpt
.........\dds_first.fit.smsg
.........\dds_first.fit.summary
.........\dds_first.flow.rpt
.........\dds_first.map.rpt
.........\dds_first.map.summary
.........\dds_first.pin
.........\dds_first.pof
.........\dds_first.qpf
.........\dds_first.qsf
.........\dds_first.qws
.........\dds_first.sim.rpt
.........\dds_first.sof
.........\dds_first.tan.rpt
.........\dds_first.tan.summary
.........\dds_first.vhd
.........\dds_first.vhd.bak
.........\dds_first.vwf
.........\reg32.vhd
.........\reg8.vhd
.........\rom.cmp
.........\rom.MIF
.........\rom.qip
.........\rom.vhd

.........\rom_waveforms.html

• We are an exchange download platform that only provides communication channels. The downloaded content comes from the internet. Except for download issues, please Google on your own.
• The downloaded content is provided for members to upload. If it unintentionally infringes on your copyright, please contact us.
• Please use Winrar for decompression tools
• If download fail, Try it againg or Feedback to us.
• If downloaded content did not match the introduction, Feedback to us，Confirm and will be refund.
• Before downloading, you can inquire through the uploaded person information

Nothing．