Programming hardware, Quartus source process, comments in detail, is your school FPGA/QuartusII good code!

Quartus程序
...........\2
...........\.\B_BCD.vhd
...........\.\db
...........\.\..\w.cbx.xml
...........\.\..\w.cmp.rdb
...........\.\..\w.dbp
...........\.\..\w.db_info
...........\.\..\w.eco.cdb
...........\.\..\w.hier_info
...........\.\..\w.hif
...........\.\..\w.map.cdb
...........\.\..\w.map.hdb
...........\.\..\w.map.logdb
...........\.\..\w.map.qmsg
...........\.\..\w.pre_map.cdb
...........\.\..\w.pre_map.hdb
...........\.\..\w.psp
...........\.\..\w.rtlv.hdb
...........\.\..\w.rtlv_sg.cdb
...........\.\..\w.rtlv_sg_swap.cdb
...........\.\..\w.sgdiff.cdb
...........\.\..\w.sgdiff.hdb
...........\.\..\w.sld_design_entry.sci
...........\.\..\w.sld_design_entry_dsc.sci
...........\.\..\w.smp_dump.txt
...........\.\..\w.syn_hier_info
...........\.\w.done
...........\.\w.flow.rpt
...........\.\w.map.rpt
...........\.\w.map.summary
...........\.\w.qpf
...........\.\w.qsf
...........\.\w.qws
...........\ALU
...........\...\ALU.rar
...........\...\ALU.vhdl
...........\ALU1
...........\....\ALU.vhdl
...........\....\ALU1.rar
...........\counter
...........\.......\atom_netlists
...........\.......\.............\decoder_7seg.vqm
...........\.......\db
...........\.......\..\decoder_7seg.asm.qmsg
...........\.......\..\decoder_7seg.cbx.xml
...........\.......\..\decoder_7seg.cdb.qmsg
...........\.......\..\decoder_7seg.cmp.kpt
...........\.......\..\decoder_7seg.cmp.logdb
...........\.......\..\decoder_7seg.cmp.rdb
...........\.......\..\decoder_7seg.dbp
...........\.......\..\decoder_7seg.db_info
...........\.......\..\decoder_7seg.eco.cdb
...........\.......\..\decoder_7seg.fit.qmsg
...........\.......\..\decoder_7seg.fnsim.hdb
...........\.......\..\decoder_7seg.fnsim.qmsg
...........\.......\..\decoder_7seg.hier_info
...........\.......\..\decoder_7seg.hif
...........\.......\..\decoder_7seg.map.cdb
...........\.......\..\decoder_7seg.map.hdb
...........\.......\..\decoder_7seg.map.logdb
...........\.......\..\decoder_7seg.map.qmsg
...........\.......\..\decoder_7seg.pre_map.cdb
...........\.......\..\decoder_7seg.pre_map.hdb
...........\.......\..\decoder_7seg.psp
...........\.......\..\decoder_7seg.rtlv.hdb
...........\.......\..\decoder_7seg.rtlv_sg.cdb
...........\.......\..\decoder_7seg.rtlv_sg_swap.cdb
...........\.......\..\decoder_7seg.sgdiff.cdb
...........\.......\..\decoder_7seg.sgdiff.hdb
...........\.......\..\decoder_7seg.sim.hdb
...........\.......\..\decoder_7seg.sim.qmsg
...........\.......\..\decoder_7seg.sim.rdb
...........\.......\..\decoder_7seg.sld_design_entry.sci
...........\.......\..\decoder_7seg.sld_design_entry_dsc.sci
...........\.......\..\decoder_7seg.syn_hier_info
...........\.......\..\decoder_7seg.tan.qmsg
...........\.......\..\wed.zsf
...........\.......\decoder_7seg.asm.rpt
...........\.......\decoder_7seg.bsf
...........\.......\decoder_7seg.done
...........\.......\decoder_7seg.dpf
...........\.......\decoder_7seg.fit.rpt
...........\.......\decoder_7seg.fit.smsg
...........\.......\decoder_7seg.fit.summary
...........\.......\decoder_7seg.flow.rpt
...........\.......\decoder_7seg.map.rpt
...........\.......\decoder_7seg.map.smsg
...........\.......\decoder_7seg.map.summary
...........\.......\decoder_7seg.pin
...........\.......\decoder_7seg.qpf
...........\.......\decoder_7seg.qsf
...........\.......\decoder_7seg.qws
...........\.......\decoder_7seg.sim.rpt
...........\.......\decoder_7seg.tan.rpt
...........\.......\decoder_7seg.tan.summary
...........\.......\decoder_7seg.v
...........\.......\decoder_7seg.vwf
...........\.......\textRAM.mif
...........\counter_7seg

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