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lift_controler-verilog

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 649kb
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  • Author :pan
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Introduction - If you have any usage issues, please Google them yourself
Elevator control procedures! ! described in verilog
Packet file list
(Preview for download)
lift_controler-verilog
......................\test.v
......................\源代码
......................\......\counter16.v
......................\......\CU.v
......................\......\Cur_floor.v
......................\......\cu_lift_1.v
......................\......\deal_user_in.v
......................\......\des_floor.v
......................\......\des_floor_top.v
......................\......\floor.v
......................\......\lift_top.v
......................\......\or16.v
......................\......\register.v
......................\......\register1.v
......................\......\search.v
......................\......\select.v
......................\......\share_input.v
......................\......\top.v
......................\......\top_top.v
......................\......\ucf.ucf
......................\电梯设计文档.doc
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